I'm using the F2812 with SPI and McBSP ports used. These both share the same CPU interrupt, 6. What is the correct way to acknowledge the interrupts so that acknowledging an SPI interrupt doesn't mask a McBSP interrupt and vice versa?
PieCtrlRegs.PIEACK.all |= PIEACK_GROUP5 or PieCtrlRegs.PIEACK.bit.ACK5 |= PIEACK_GROUP5?
I have found both methods used in the TI examples and can't find any documentaion explaining the difference.
The McBSP is running from boot and runs continuously, but is stopped when a command is received from the SCI, reconfigured and restarted again. The SPI port is initalized, but it's Tx interrupt is left disabled until a transmit is required. On a scheduled event the SPI Tx interrupt s enabled (PieCtrlRegs.PIEIER6.bit.INTx2 = 1; ) and the data transmitted, on completion the interrupt is disabled again like this from within the SPI Tx HWI:
PieCtrlRegs.PIEIER6.bit.INTx2 = 0; //Disable PIE Group 6, INT 2
asm( " NOP");
asm( " NOP");
asm( " NOP");
asm( " NOP");
asm( " NOP");
PieCtrlRegs.PIEIER6.bit.INTx2 = 0; //Disable PIE Group 6, INT 2
EINT;
Is this the correct way to disable an interrupt without affecting any other interrupt? I'm getting occational SPI reply data which is currupt and wonder if my interrupt handelling is causing a problem.
Thanks in advance
Simon