- We understand that we must drive PORESET when the CPU supply voltage is below the min operating range. Is there a minimum supply voltage below which we don’t have to drive PORESET low? We ask this because most drivers that we could use on PORESET would have some minimum operating range. For example, if we drove it from a logic device that would guarantee driving PORESET to its reset state for supply voltge down to 3V, would that be good enough?
- Is there a limit on max rise time on PORESET? We might want to drive it from a relatively slow rising open-collector comparator.
- We understand from the data sheet that both RS and PORESET should be held in reset until the input clock is valid. What is a good minimum delay after clock goes valid?