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placement fail for section .text if lookup tables are implemented

Francesco Fraccaroli
Prodigy 120 points

Hi all

I'm working to a SV-PWM controller, on F2812, and I need to calculate Park-transform to implement a dq-PLL. Because the high frequency of the reference signal, I have to use integer data type with global scale factor. I have to implement the lookup table for sine and cosine function, but I've got some problems. I tried two different solution:

- I declare a vector of 5000 element with value of sin, and I place it in FLASHB sector of flash with the

     #pragma DATA_SECTION(sinLUT, "sin_LUT");

where sin_LUT is a section in the .cmd file,

      "sin_LUT               : > FLASHB       PAGE = 1, TYPE = NOLOAD"

- I declare a function with the same vector declared in, and I return the value at the specified index. I place in FLASHG sector with the

     #pragma CODE_SECTION(sin_fsg, "sin_LUT");

In both case, the compiler give me this error

placement fails for object ".text",    F2812.cmd

Anyone had the same problem? What should I do?

  • 0
    TI__Genius 15260 points

    Francesco,

    You need to allocate more memory space for your .text in the linker command file (F2812.cmd).  Your lookup tables are making this section too large, so you need to modify the file to increase the memory region dedicated to .text or split the .text across different memory regions. 

    Kris

  • 0 in reply to Kris Parrent
    Prodigy 120 points

    Dear Kris

    thank you! I solved the problem, but why, if I declare the vector to be allocated in a different sector from .text by the directive #pragma, the section .text became too large? In my opinion, if I write

    #pragma DATA_SECTION(sinLUT, "sin_LUT");

    the vector of the lookup table have to be allocated in the sin_LUT section of memory. I need this, because I want choose the memory (ROM, RAM or FLASH) where place the vector for a faster execution.

  • 0 in reply to Francesco Fraccaroli
    TI__Genius 15260 points

    Francesco,

    This is difficult to say what exactly is happening because it is very application specific.  What I would recommend doing is when you build your project it generates a .map file in the Debug folder of your project.  This file will show all of your code placements and how much space they are using.  I would recommend trying a few different options, i.e. without the #pragma, without the LUT altogether, etc to see how it is affecting the size of the .text.  It may just be slightly increasing the .text enough to cause the overflow or in some cases could even be related to other memory regions overrunning their space.

    Kris

  • 0 in reply to Kris Parrent
    Prodigy 120 points

    Dear Kris

    I'm sorry, but I haven't understand yet. In assembly I used the .usect directive to create sections in which place my variables. In C it is not possible with the directive #pragma?

  • 0 in reply to Francesco Fraccaroli
    TI__Mastermind 19810 points

    Francesco

    the #pragma declarations you show above in your post and the linker command snippets you show looks fine to me. They shouldn't throw an error except that if you are also linking your .text section to the same memory section, because now you have the LUTs and .text both linking to the same memory range the linker is identifying that it will not be able to fit.

    Try to increase the memory section size or link the LUTs to a different memory section. Please attach the linker command file that is giving you error, we can take a look at it.

     

    Best Regards

    Santosh

     

  • 0 in reply to Santosh Athuru
    Prodigy 120 points

    Hi Santosh

    I tried to increase the .text memory section and all seems to be OK, but I don't understand why. My commando file is this:

    MEMORY
    {
    PAGE 0:    /* Program Memory */
               /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE1 for data allocation */

       ZONE0       : origin = 0x002000, length = 0x002000     /* XINTF zone 0 */
       ZONE1       : origin = 0x004000, length = 0x002000     /* XINTF zone 1 */
       RAML0       : origin = 0x008000, length = 0x001000     /* on-chip RAM block L0 */
       ZONE2       : origin = 0x080000, length = 0x080000     /* XINTF zone 2 */
       ZONE6       : origin = 0x100000, length = 0x080000     /* XINTF zone 6 */
       OTP         : origin = 0x3D7800, length = 0x000800     /* on-chip OTP */
       FLASHJ      : origin = 0x3D8000, length = 0x002000     /* on-chip FLASH */
       FLASHI      : origin = 0x3DA000, length = 0x002000     /* on-chip FLASH */
       FLASHH      : origin = 0x3DC000, length = 0x004000     /* on-chip FLASH */
       FLASHG      : origin = 0x3E0000, length = 0x004000     /* on-chip FLASH */
       FLASHF      : origin = 0x3E4000, length = 0x004000     /* on-chip FLASH */
       FLASHE      : origin = 0x3E8000, length = 0x004000     /* on-chip FLASH */
       FLASHD      : origin = 0x3EC000, length = 0x004000     /* on-chip FLASH */
       FLASHC      : origin = 0x3F0000, length = 0x004000     /* on-chip FLASH */
       FLASHA      : origin = 0x3F6000, length = 0x001F80     /* on-chip FLASH */
       CSM_RSVD    : origin = 0x3F7F80, length = 0x000076     /* Part of FLASHA.  Program with all 0x0000 when CSM is in use. */
       BEGIN       : origin = 0x3F7FF6, length = 0x000002     /* Part of FLASHA.  Used for "boot to Flash" bootloader mode. */
       CSM_PWL     : origin = 0x3F7FF8, length = 0x000008     /* Part of FLASHA.  CSM password locations in FLASHA */
       
    /* ZONE7       : origin = 0x3FC000, length = 0x003FC0     /* XINTF zone 7 available if MP/MCn=1 */ 
       ROM         : origin = 0x3FF000, length = 0x000FC0     /* Boot ROM available if MP/MCn=0 */
       RESET       : origin = 0x3FFFC0, length = 0x000002     /* part of boot ROM (MP/MCn=0) or XINTF zone 7 (MP/MCn=1) */
       VECTORS     : origin = 0x3FFFC2, length = 0x00003E     /* part of boot ROM (MP/MCn=0) or XINTF zone 7 (MP/MCn=1) */

    PAGE 1 :   /* Data Memory */
               /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE0 for program allocation */
               /* Registers remain on PAGE1                                                  */

       RAMM0       : origin = 0x000000, length = 0x000400     /* on-chip RAM block M0 */
       RAMM1       : origin = 0x000400, length = 0x000400     /* on-chip RAM block M1 */
       RAML1       : origin = 0x009000, length = 0x001000     /* on-chip RAM block L1 */
       FLASHB      : origin = 0x3F4000, length = 0x002000     /* on-chip FLASH */
       RAMH0       : origin = 0x3F8000, length = 0x002000     /* on-chip RAM block H0 */
       //LUT           : origin = 0x3FA000, length = 0x004900        /*spazio per le LUT*/




       DEV_EMU     : origin = 0x000880, length = 0x000180     /* device emulation registers */
       PIE_VECT    : origin = 0x000D00, length = 0x000100     /* PIE Vector Table */
       FLASH_REGS  : origin = 0x000A80, length = 0x000060     /* FLASH registers */
       CSM         : origin = 0x000AE0, length = 0x000010     /* code security module registers */
       XINTF       : origin = 0x000B20, length = 0x000020     /* external interface registers */
       CPU_TIMER0  : origin = 0x000C00, length = 0x000008     /* CPU Timer0 registers */
       CPU_TIMER1  : origin = 0x000C08, length = 0x000008     /* CPU Timer1 registers */
       CPU_TIMER2  : origin = 0x000C10, length = 0x000008     /* CPU Timer2 registers */
       PIE_CTRL    : origin = 0x000CE0, length = 0x000020     /* PIE control registers */
       ECANA       : origin = 0x006000, length = 0x000040     /* eCAN control and status registers */
       ECANA_LAM   : origin = 0x006040, length = 0x000040     /* eCAN local acceptance masks */
       ECANA_MOTS  : origin = 0x006080, length = 0x000040     /* eCAN message object time stamps */
       ECANA_MOTO  : origin = 0x0060C0, length = 0x000040     /* eCAN object time-out registers */
       ECANA_MBOX  : origin = 0x006100, length = 0x000100     /* eCAN mailboxes */
       SYSTEM      : origin = 0x007010, length = 0x000020     /* System control registers */
       SPIA        : origin = 0x007040, length = 0x000010     /* SPI registers */
       SCIA        : origin = 0x007050, length = 0x000010     /* SCI-A registers */
       XINTRUPT    : origin = 0x007070, length = 0x000010     /* external interrupt registers */
       GPIOMUX     : origin = 0x0070C0, length = 0x000020     /* GPIO mux registers */
       GPIODAT     : origin = 0x0070E0, length = 0x000020     /* GPIO data registers */
       ADC         : origin = 0x007100, length = 0x000020     /* ADC registers */
       EVA         : origin = 0x007400, length = 0x000040     /* Event Manager A registers */
       EVB         : origin = 0x007500, length = 0x000040     /* Event Manager B registers */
       SCIB        : origin = 0x007750, length = 0x000010     /* SCI-B registers */
       MCBSPA      : origin = 0x007800, length = 0x000040     /* McBSP registers */
       CSM_PWL     : origin = 0x3F7FF8, length = 0x000008     /* Part of FLASHA.  CSM password locations. */

    }
    /* Allocate sections to memory blocks.
       Note:
             codestart user defined section in DSP28_CodeStartBranch.asm used to redirect code 
                       execution when booting to flash
             ramfuncs  user defined section to store functions that will be copied from Flash into RAM
    */ 
     
    SECTIONS
    {
     
       /* Allocate program areas: */
       .cinit              : > FLASHA      PAGE = 0
       .pinit              : > FLASHA,     PAGE = 0
       .text               : > FLASHC      PAGE = 0
       codestart           : > BEGIN       PAGE = 0
       ramfuncs            : LOAD = FLASHD, 
                             RUN = RAML0, 
                             LOAD_START(_RamfuncsLoadStart),
                             LOAD_END(_RamfuncsLoadEnd),
                             RUN_START(_RamfuncsRunStart),
                             PAGE = 0

       csmpasswds          : > CSM_PWL     PAGE = 0
       csm_rsvd            : > CSM_RSVD    PAGE = 0
       
       /* Allocate uninitalized data sections: */
       .stack              : > RAMM0       PAGE = 1
       .ebss               : > RAML1       PAGE = 1
       .esysmem            : > RAMH0       PAGE = 1

       /* Initalized sections go in Flash */
       /* For SDFlash to program these, they must be allocated to page 0 */
       .econst             : > FLASHA      PAGE = 0
       .switch             : > FLASHA      PAGE = 0      

       /* Allocate IQ math areas: */
       //IQmath              : > FLASHC      PAGE = 0                  /* Math Code */
       //IQmathTables        : > ROM         PAGE = 0, TYPE = NOLOAD   /* Math Tables In ROM */

       /* .reset is a standard section used by the compiler.  It contains the */ 
       /* the address of the start of _c_int00 for C Code.   /*
       /* When using the boot ROM this section and the CPU vector */
       /* table is not needed.  Thus the default type is set here to  */
       /* DSECT  */ 
       .reset              : > RESET,      PAGE = 0, TYPE = DSECT
       vectors             : > VECTORS     PAGE = 0, TYPE = DSECT

       sin_LUT               : > FLASHB       PAGE = 1, TYPE = NOLOAD

       PieVectTableFile : > PIE_VECT,   PAGE = 1

    /*** Peripheral Frame 0 Register Structures ***/
       DevEmuRegsFile    : > DEV_EMU,     PAGE = 1
       FlashRegsFile     : > FLASH_REGS,  PAGE = 1
       CsmRegsFile       : > CSM,         PAGE = 1
       XintfRegsFile     : > XINTF,       PAGE = 1
       CpuTimer0RegsFile : > CPU_TIMER0,  PAGE = 1
       CpuTimer1RegsFile : > CPU_TIMER1,  PAGE = 1
       CpuTimer2RegsFile : > CPU_TIMER2,  PAGE = 1
       PieCtrlRegsFile   : > PIE_CTRL,    PAGE = 1

    /*** Peripheral Frame 1 Register Structures ***/
       ECanaRegsFile     : > ECANA,       PAGE = 1
       ECanaLAMRegsFile  : > ECANA_LAM    PAGE = 1
       ECanaMboxesFile   : > ECANA_MBOX   PAGE = 1
       ECanaMOTSRegsFile : > ECANA_MOTS   PAGE = 1
       ECanaMOTORegsFile : > ECANA_MOTO   PAGE = 1

    /*** Peripheral Frame 2 Register Structures ***/
       SysCtrlRegsFile   : > SYSTEM,      PAGE = 1
       SpiaRegsFile      : > SPIA,        PAGE = 1
       SciaRegsFile      : > SCIA,        PAGE = 1
       XIntruptRegsFile  : > XINTRUPT,    PAGE = 1
       GpioMuxRegsFile   : > GPIOMUX,     PAGE = 1
       GpioDataRegsFile  : > GPIODAT      PAGE = 1
       AdcRegsFile       : > ADC,         PAGE = 1
       EvaRegsFile       : > EVA,         PAGE = 1
       EvbRegsFile       : > EVB,         PAGE = 1
       ScibRegsFile      : > SCIB,        PAGE = 1
       McbspaRegsFile    : > MCBSPA,      PAGE = 1

    /*** Code Security Module Register Structures ***/
       CsmPwlFile        : > CSM_PWL,     PAGE = 1

    }
  • 0 in reply to Francesco Fraccaroli
    Prodigy 120 points

    Most section of memory where location of registers, so I make the file more clear...

    MEMORY
    {
    PAGE 0:    /* Program Memory */
               /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE1 for data allocation */

       ZONE0       : origin = 0x002000, length = 0x002000     /* XINTF zone 0 */
       ZONE1       : origin = 0x004000, length = 0x002000     /* XINTF zone 1 */
       RAML0       : origin = 0x008000, length = 0x001000     /* on-chip RAM block L0 */
       ZONE2       : origin = 0x080000, length = 0x080000     /* XINTF zone 2 */
       ZONE6       : origin = 0x100000, length = 0x080000     /* XINTF zone 6 */
       OTP         : origin = 0x3D7800, length = 0x000800     /* on-chip OTP */
       FLASHJ      : origin = 0x3D8000, length = 0x002000     /* on-chip FLASH */
       FLASHI      : origin = 0x3DA000, length = 0x002000     /* on-chip FLASH */
       FLASHH      : origin = 0x3DC000, length = 0x004000     /* on-chip FLASH */
       FLASHG      : origin = 0x3E0000, length = 0x004000     /* on-chip FLASH */
       FLASHF      : origin = 0x3E4000, length = 0x004000     /* on-chip FLASH */
       FLASHE      : origin = 0x3E8000, length = 0x004000     /* on-chip FLASH */
       FLASHD      : origin = 0x3EC000, length = 0x004000     /* on-chip FLASH */
       FLASHC      : origin = 0x3F0000, length = 0x004000     /* on-chip FLASH */
       FLASHA      : origin = 0x3F6000, length = 0x001F80     /* on-chip FLASH */
       CSM_RSVD    : origin = 0x3F7F80, length = 0x000076     /* Part of FLASHA.  Program with all 0x0000 when CSM is in use. */
       BEGIN       : origin = 0x3F7FF6, length = 0x000002     /* Part of FLASHA.  Used for "boot to Flash" bootloader mode. */
       CSM_PWL     : origin = 0x3F7FF8, length = 0x000008     /* Part of FLASHA.  CSM password locations in FLASHA */
       
    /* ZONE7       : origin = 0x3FC000, length = 0x003FC0     /* XINTF zone 7 available if MP/MCn=1 */ 
       ROM         : origin = 0x3FF000, length = 0x000FC0     /* Boot ROM available if MP/MCn=0 */
       RESET       : origin = 0x3FFFC0, length = 0x000002     /* part of boot ROM (MP/MCn=0) or XINTF zone 7 (MP/MCn=1) */
       VECTORS     : origin = 0x3FFFC2, length = 0x00003E     /* part of boot ROM (MP/MCn=0) or XINTF zone 7 (MP/MCn=1) */

    PAGE 1 :   /* Data Memory */
               /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE0 for program allocation */
               /* Registers remain on PAGE1                                                  */

       RAMM0       : origin = 0x000000, length = 0x000400     /* on-chip RAM block M0 */
       RAMM1       : origin = 0x000400, length = 0x000400     /* on-chip RAM block M1 */
       RAML1       : origin = 0x009000, length = 0x001000     /* on-chip RAM block L1 */
       FLASHB      : origin = 0x3F4000, length = 0x002000     /* on-chip FLASH */
       RAMH0       : origin = 0x3F8000, length = 0x002000     /* on-chip RAM block H0 */
       //LUT           : origin = 0x3FA000, length = 0x004900        /*spazio per le LUT*/
    }
    /* Allocate sections to memory blocks.
       Note:
             codestart user defined section in DSP28_CodeStartBranch.asm used to redirect code 
                       execution when booting to flash
             ramfuncs  user defined section to store functions that will be copied from Flash into RAM
    */ 
     
    SECTIONS
    {
     
       /* Allocate program areas: */
       .cinit              : > FLASHA      PAGE = 0
       .pinit              : > FLASHA,     PAGE = 0
       .text               : > FLASHC      PAGE = 0
       codestart           : > BEGIN       PAGE = 0
       ramfuncs            : LOAD = FLASHD, 
                             RUN = RAML0, 
                             LOAD_START(_RamfuncsLoadStart),
                             LOAD_END(_RamfuncsLoadEnd),
                             RUN_START(_RamfuncsRunStart),
                             PAGE = 0

       csmpasswds          : > CSM_PWL     PAGE = 0
       csm_rsvd            : > CSM_RSVD    PAGE = 0
       
       /* Allocate uninitalized data sections: */
       .stack              : > RAMM0       PAGE = 1
       .ebss               : > RAML1       PAGE = 1
       .esysmem            : > RAMH0       PAGE = 1

       /* Initalized sections go in Flash */
       /* For SDFlash to program these, they must be allocated to page 0 */
       .econst             : > FLASHA      PAGE = 0
       .switch             : > FLASHA      PAGE = 0      

       /* Allocate IQ math areas: */
       //IQmath              : > FLASHC      PAGE = 0                  /* Math Code */
       //IQmathTables        : > ROM         PAGE = 0, TYPE = NOLOAD   /* Math Tables In ROM */

       /* .reset is a standard section used by the compiler.  It contains the */ 
       /* the address of the start of _c_int00 for C Code.   /*
       /* When using the boot ROM this section and the CPU vector */
       /* table is not needed.  Thus the default type is set here to  */
       /* DSECT  */ 
       .reset              : > RESET,      PAGE = 0, TYPE = DSECT
       vectors             : > VECTORS     PAGE = 0, TYPE = DSECT

       sin_LUT               : > FLASHB       PAGE = 1, TYPE = NOLOAD

       PieVectTableFile : > PIE_VECT,   PAGE = 1

    }
  • 0 in reply to Francesco Fraccaroli
    TI__Mastermind 19810 points

    good, its ok now because you have increased the size.

    Try to inspect the final map file, it will show you how much memory is used by your LUTs and what else is linked into the text section of the memory.

     

    Best Regards

    Santosh

  • 0 in reply to Santosh Athuru
    Prodigy 120 points

    I inserted my MAP file.

    Trying to print the LUT I even notice that at every index I try to read, the result is -1 (that isa also the last element of the LUT). That seems to be wrong!

    This LUT is becoming a time-wasting solution. Is there any guide/documentation "How to make a look up table"?

    Fullscreen 2330.controlloADC_fsg.txt Download 
    ******************************************************************************
             TMS320C2000 Linker PC v6.0.2                      
******************************************************************************
>> Linked Fri Aug 03 11:40:02 2012

OUTPUT FILE NAME:   <controlloADC_fsg.out>
ENTRY POINT SYMBOL: "_c_int00"  address: 003f0b0d


MEMORY CONFIGURATION

         name            origin    length      used     unused   attr    fill
----------------------  --------  ---------  --------  --------  ----  --------
PAGE 0:
  ZONE0                 00002000   00002000  00000000  00002000  RWIX
  ZONE1                 00004000   00002000  00000000  00002000  RWIX
  RAML0                 00008000   00001000  00000017  00000fe9  RWIX
  ZONE2                 00080000   00080000  00000000  00080000  RWIX
  ZONE6                 00100000   00080000  00000000  00080000  RWIX
  OTP                   003d7800   00000800  00000000  00000800  RWIX
  FLASHJ                003d8000   00002000  00000000  00002000  RWIX
  FLASHI                003da000   00002000  00000000  00002000  RWIX
  FLASHH                003dc000   00004000  00000000  00004000  RWIX
  FLASHG                003e0000   00004000  00000000  00004000  RWIX
  FLASHF                003e4000   00004000  00000000  00004000  RWIX
  FLASHE                003e8000   00004000  00000000  00004000  RWIX
  FLASHD                003ec000   00004000  00000017  00003fe9  RWIX
  FLASHC                003f0000   00004000  00000c93  0000336d  RWIX
  FLASHA                003f6000   00001f80  00001970  00000610  RWIX
  CSM_RSVD              003f7f80   00000076  00000000  00000076  RWIX
  BEGIN                 003f7ff6   00000002  00000000  00000002  RWIX
  CSM_PWL               003f7ff8   00000008  00000000  00000008  RWIX
  ROM                   003ff000   00000fc0  00000000  00000fc0  RWIX
  RESET                 003fffc0   00000002  00000000  00000002  RWIX
  VECTORS               003fffc2   0000003e  00000000  0000003e  RWIX

PAGE 1:
  RAMM0                 00000000   00000400  00000000  00000400  RWIX
  RAMM1                 00000400   00000400  00000000  00000400  RWIX
  DEV_EMU               00000880   00000180  000000d0  000000b0  RWIX
  FLASH_REGS            00000a80   00000060  00000008  00000058  RWIX
  CSM                   00000ae0   00000010  00000010  00000000  RWIX
  XINTF                 00000b20   00000020  00000020  00000000  RWIX
  CPU_TIMER0            00000c00   00000008  00000008  00000000  RWIX
  CPU_TIMER1            00000c08   00000008  00000008  00000000  RWIX
  CPU_TIMER2            00000c10   00000008  00000008  00000000  RWIX
  PIE_CTRL              00000ce0   00000020  0000001a  00000006  RWIX
  PIE_VECT              00000d00   00000100  00000100  00000000  RWIX
  ECANA                 00006000   00000040  00000034  0000000c  RWIX
  ECANA_LAM             00006040   00000040  00000040  00000000  RWIX
  ECANA_MOTS            00006080   00000040  00000040  00000000  RWIX
  ECANA_MOTO            000060c0   00000040  00000040  00000000  RWIX
  ECANA_MBOX            00006100   00000100  00000100  00000000  RWIX
  SYSTEM                00007010   00000020  00000020  00000000  RWIX
  SPIA                  00007040   00000010  00000010  00000000  RWIX
  SCIA                  00007050   00000010  00000010  00000000  RWIX
  XINTRUPT              00007070   00000010  00000010  00000000  RWIX
  GPIOMUX               000070c0   00000020  00000020  00000000  RWIX
  GPIODAT               000070e0   00000020  00000020  00000000  RWIX
  ADC                   00007100   00000020  0000001a  00000006  RWIX
  EVA                   00007400   00000040  00000032  0000000e  RWIX
  EVB                   00007500   00000040  00000032  0000000e  RWIX
  SCIB                  00007750   00000010  00000010  00000000  RWIX
  MCBSPA                00007800   00000040  00000025  0000001b  RWIX
  RAML1                 00009000   00001000  00000000  00001000  RWIX
  FLASHB                003f4000   00002000  00000000  00002000  RWIX
  CSM_PWL               003f7ff8   00000008  00000008  00000000  RWIX
  RAMH0                 003f8000   00002000  00000400  00001c00  RWIX


SECTION ALLOCATION MAP

 output                                  attributes/
section   page    origin      length       input sections
--------  ----  ----------  ----------   ----------------
.pinit     0    003f6000    00000000     UNINITIALIZED

.ebss      1    00000000    00001ed6     FAILED TO ALLOCATE
ramfuncs   0    003ec000    00000017     RUN ADDR = 00008000
                  003ec000    00000017     DSP281x_SysCtrl.obj (ramfuncs)

.text      0    003f0000    00000c93     
                  003f0000    000003f5     GestAdc.obj (.text)
                  003f03f5    000001d7     main.obj (.text:retain)
                  003f05cc    0000015f     DSP281x_DefaultIsr.obj (.text:retain)
                  003f072b    0000011a     main.obj (.text)
                  003f0845    000000c9     GestSci.obj (.text)
                  003f090e    000000a8     GestTimer.obj (.text)
                  003f09b6    00000082     DSP281x_SysCtrl.obj (.text)
                  003f0a38    00000079     conversione.obj (.text)
                  003f0ab1    0000005c     trasformate.obj (.text)
                  003f0b0d    00000044     rts2800_ml.lib : boot.obj (.text)
                  003f0b51    0000002b     DSP281x_PieCtrl.obj (.text)
                  003f0b7c    0000002a     rts2800_ml.lib : l_div.obj (.text)
                  003f0ba6    00000024     LookUpTable.obj (.text)
                  003f0bca    00000022     rts2800_ml.lib : i_div.obj (.text)
                  003f0bec    00000021                    : memcpy_ff.obj (.text)
                  003f0c0d    00000020     DSP281x_PieVect.obj (.text)
                  003f0c2d    00000019     rts2800_ml.lib : args_main.obj (.text)
                  003f0c46    00000019                    : exit.obj (.text)
                  003f0c5f    0000000d     DSP281x_usDelay.obj (.text)
                  003f0c6c    0000000b     rts2800_ml.lib : u_div.obj (.text)
                  003f0c77    0000000a     calcoloRMS.obj (.text)
                  003f0c81    00000009     DSP281x_CodeStartBranch.obj (.text)
                  003f0c8a    00000009     rts2800_ml.lib : _lock.obj (.text)

.econst    0    003f6000    000018fa     
                  003f6000    0000160d     LookUpTable.obj (.econst:_$P$T0$1)
                  003f760d    00000001     --HOLE-- [fill = 0]
                  003f760e    000001c1     GestAdc.obj (.econst:.string)
                  003f77cf    00000001     --HOLE-- [fill = 0]
                  003f77d0    00000100     DSP281x_PieVect.obj (.econst)
                  003f78d0    0000002a     main.obj (.econst:.string)

.switch    0    003f78fa    00000060     
                  003f78fa    00000020     GestAdc.obj (.switch:_stampaRegistriADC)
                  003f791a    00000020     GestAdc.obj (.switch:_stampaRegistroADC)
                  003f793a    00000020     GestAdc.obj (.switch:_stampaRegistroADC_offset)

.cinit     0    003f795a    00000016     
                  003f795a    0000000a     rts2800_ml.lib : _lock.obj (.cinit)
                  003f7964    0000000a                    : exit.obj (.cinit)
                  003f796e    00000002     --HOLE-- [fill = 0]

.reset     0    003fffc0    00000002     DSECT
                  003fffc0    00000002     rts2800_ml.lib : boot.obj (.reset)

vectors    0    003fffc2    00000000     DSECT

DevEmuRegsFile 
*          1    00000880    000000d0     UNINITIALIZED
                  00000880    000000d0     DSP281x_GlobalVariableDefs.obj (DevEmuRegsFile)

FlashRegsFile 
*          1    00000a80    00000008     UNINITIALIZED
                  00000a80    00000008     DSP281x_GlobalVariableDefs.obj (FlashRegsFile)

CsmRegsFile 
*          1    00000ae0    00000010     UNINITIALIZED
                  00000ae0    00000010     DSP281x_GlobalVariableDefs.obj (CsmRegsFile)

XintfRegsFile 
*          1    00000b20    00000020     UNINITIALIZED
                  00000b20    00000020     DSP281x_GlobalVariableDefs.obj (XintfRegsFile)

CpuTimer0RegsFile 
*          1    00000c00    00000008     UNINITIALIZED
                  00000c00    00000008     DSP281x_GlobalVariableDefs.obj (CpuTimer0RegsFile)

CpuTimer1RegsFile 
*          1    00000c08    00000008     UNINITIALIZED
                  00000c08    00000008     DSP281x_GlobalVariableDefs.obj (CpuTimer1RegsFile)

CpuTimer2RegsFile 
*          1    00000c10    00000008     UNINITIALIZED
                  00000c10    00000008     DSP281x_GlobalVariableDefs.obj (CpuTimer2RegsFile)

PieCtrlRegsFile 
*          1    00000ce0    0000001a     UNINITIALIZED
                  00000ce0    0000001a     DSP281x_GlobalVariableDefs.obj (PieCtrlRegsFile)

PieVectTableFile 
*          1    00000d00    00000100     UNINITIALIZED
                  00000d00    00000100     DSP281x_GlobalVariableDefs.obj (PieVectTableFile)

ECanaRegsFile 
*          1    00006000    00000034     UNINITIALIZED
                  00006000    00000034     DSP281x_GlobalVariableDefs.obj (ECanaRegsFile)

ECanaLAMRegsFile 
*          1    00006040    00000040     UNINITIALIZED
                  00006040    00000040     DSP281x_GlobalVariableDefs.obj (ECanaLAMRegsFile)

ECanaMOTSRegsFile 
*          1    00006080    00000040     UNINITIALIZED
                  00006080    00000040     DSP281x_GlobalVariableDefs.obj (ECanaMOTSRegsFile)

ECanaMOTORegsFile 
*          1    000060c0    00000040     UNINITIALIZED
                  000060c0    00000040     DSP281x_GlobalVariableDefs.obj (ECanaMOTORegsFile)

ECanaMboxesFile 
*          1    00006100    00000100     UNINITIALIZED
                  00006100    00000100     DSP281x_GlobalVariableDefs.obj (ECanaMboxesFile)

SysCtrlRegsFile 
*          1    00007010    00000020     UNINITIALIZED
                  00007010    00000020     DSP281x_GlobalVariableDefs.obj (SysCtrlRegsFile)

SpiaRegsFile 
*          1    00007040    00000010     UNINITIALIZED
                  00007040    00000010     DSP281x_GlobalVariableDefs.obj (SpiaRegsFile)

SciaRegsFile 
*          1    00007050    00000010     UNINITIALIZED
                  00007050    00000010     DSP281x_GlobalVariableDefs.obj (SciaRegsFile)

XIntruptRegsFile 
*          1    00007070    00000010     UNINITIALIZED
                  00007070    00000010     DSP281x_GlobalVariableDefs.obj (XIntruptRegsFile)

GpioMuxRegsFile 
*          1    000070c0    00000020     UNINITIALIZED
                  000070c0    00000020     DSP281x_GlobalVariableDefs.obj (GpioMuxRegsFile)

GpioDataRegsFile 
*          1    000070e0    00000020     UNINITIALIZED
                  000070e0    00000020     DSP281x_GlobalVariableDefs.obj (GpioDataRegsFile)

AdcRegsFile 
*          1    00007100    0000001a     UNINITIALIZED
                  00007100    0000001a     DSP281x_GlobalVariableDefs.obj (AdcRegsFile)

EvaRegsFile 
*          1    00007400    00000032     UNINITIALIZED
                  00007400    00000032     DSP281x_GlobalVariableDefs.obj (EvaRegsFile)

EvbRegsFile 
*          1    00007500    00000032     UNINITIALIZED
                  00007500    00000032     DSP281x_GlobalVariableDefs.obj (EvbRegsFile)

ScibRegsFile 
*          1    00007750    00000010     UNINITIALIZED
                  00007750    00000010     DSP281x_GlobalVariableDefs.obj (ScibRegsFile)

McbspaRegsFile 
*          1    00007800    00000025     UNINITIALIZED
                  00007800    00000025     DSP281x_GlobalVariableDefs.obj (McbspaRegsFile)

CsmPwlFile 
*          1    003f7ff8    00000008     UNINITIALIZED
                  003f7ff8    00000008     DSP281x_GlobalVariableDefs.obj (CsmPwlFile)

.stack     1    003f8000    00000400     UNINITIALIZED
                  003f8000    00000400     --HOLE--


GLOBAL SYMBOLS: SORTED ALPHABETICALLY BY Name 

address    name
--------   ----
003f0000   .text
003f0c46   C$$EXIT
003f0bca   I$$DIV
003f0bdb   I$$MOD
003f0b7c   L$$DIV
003f0b8b   L$$MOD
003f0c6c   U$$DIV
003f0c71   U$$MOD
003f0b99   UL$$DIV
003f0ba0   UL$$MOD
003f064f   _ADCINT_ISR
00007100   _AdcRegs
003f0695   _CAPINT1_ISR
003f069a   _CAPINT2_ISR
003f069f   _CAPINT3_ISR
003f06db   _CAPINT4_ISR
003f06e0   _CAPINT5_ISR
003f06e5   _CAPINT6_ISR
003f065e   _CMP1INT_ISR
003f0663   _CMP2INT_ISR
003f0668   _CMP3INT_ISR
003f06a4   _CMP4INT_ISR
003f06a9   _CMP5INT_ISR
003f06ae   _CMP6INT_ISR
00000c00   _CpuTimer0Regs
00000c08   _CpuTimer1Regs
00000c10   _CpuTimer2Regs
003f7ff8   _CsmPwl
00000ae0   _CsmRegs
003f0a07   _CsmUnlock
003f05d6   _DATALOG_ISR
00000880   _DevEmuRegs
003f09c8   _DisableDog
003f0712   _ECAN0INTA_ISR
003f0717   _ECAN1INTA_ISR
00006040   _ECanaLAMRegs
000060c0   _ECanaMOTORegs
00006080   _ECanaMOTSRegs
00006100   _ECanaMboxes
00006000   _ECanaRegs
003f071c   _EMPTY_ISR
003f05e0   _EMUINT_ISR
003f0b70   _EnableInterrupts
00007400   _EvaRegs
00007500   _EvbRegs
00000a80   _FlashRegs
000070e0   _GpioDataRegs
000070c0   _GpioMuxRegs
003f05ea   _ILLEGAL_ISR
003f05cc   _INT13_ISR
003f05d1   _INT14_ISR
00000028   _Iabc
00000018   _Ialphabeta
00000004   _Idc
00000010   _Idq
00008000   _InitFlash
003f09ed   _InitPeripheralClocks
003f0b51   _InitPieCtrl
003f0c0d   _InitPieVectTable
003f09d0   _InitPll
003f0845   _InitSci
003f09b6   _InitSysCtrl
003f09be   _KickDog
003f06f4   _MRINTA_ISR
003f06f9   _MXINTA_ISR
00007800   _McbspaRegs
003f05e5   _NMI_ISR
003f063b   _PDPINTA_ISR
003f0640   _PDPINTB_ISR
003f0721   _PIE_RESERVED
003f07d3   _PLL
00000ce0   _PieCtrlRegs
00000d00   _PieVectTable
003f77d0   _PieVectTableInit
00000022   _RMS
003f0c77   _RMS_sum
0000002e   _RMSbuf
003f05db   _RTOSINT_ISR
003ec017   _RamfuncsLoadEnd
003ec000   _RamfuncsLoadStart
00008000   _RamfuncsRunStart
003f06fe   _SCIRXINTA_ISR
003f0708   _SCIRXINTB_ISR
003f0703   _SCITXINTA_ISR
003f070d   _SCITXINTB_ISR
003f06ea   _SPIRXINTA_ISR
003f06ef   _SPITXINTA_ISR
00007050   _SciaRegs
00007750   _ScibRegs
00007040   _SpiaRegs
00007010   _SysCtrlRegs
003f0672   _T1CINT_ISR
003f067c   _T1OFINT_ISR
003f066d   _T1PINT_ISR
003f0677   _T1UFINT_ISR
003f0686   _T2CINT_ISR
003f0690   _T2OFINT_ISR
003f0681   _T2PINT_ISR
003f068b   _T2UFINT_ISR
003f06b8   _T3CINT_ISR
003f06c2   _T3OFINT_ISR
003f06b3   _T3PINT_ISR
003f06bd   _T3UFINT_ISR
003f06cc   _T4CINT_ISR
003f06d6   _T4OFINT_ISR
003f06c7   _T4PINT_ISR
003f06d1   _T4UFINT_ISR
003f0654   _TINT0_ISR
003f062c   _USER10_ISR
003f0631   _USER11_ISR
003f0636   _USER12_ISR
003f05ff   _USER1_ISR
003f0604   _USER2_ISR
003f0609   _USER3_ISR
003f060e   _USER4_ISR
003f0613   _USER5_ISR
003f0618   _USER6_ISR
003f061d   _USER7_ISR
003f0622   _USER8_ISR
003f0627   _USER9_ISR
000000c0   _UaBuf
000005c0   _UaBuf2
0000001c   _Uabc
000002c0   _UalphaBuf
00000014   _Ualphabeta
00000040   _UbBuf
00000500   _UbBuf2
00000380   _UbetaBuf
00000140   _UcBuf
00000440   _UcBuf2
00000008   _Udc
0000000c   _Udq
003f0659   _WAKEINT_ISR
003f0645   _XINT1_ISR
003f064a   _XINT2_ISR
00007070   _XIntruptRegs
00000b20   _XintfRegs
003f8400   __STACK_END
00000400   __STACK_SIZE
00000001   __TI_args_main
ffffffff   ___binit__
ffffffff   ___c_args__
003f795a   ___cinit__
003f0c93   ___etext__
003f0bec   ___memcpy_ff
ffffffff   ___pinit__
003f0000   ___text__
003f0c2d   __args_main
00001ed2   __cleanup_ptr
00001ed4   __dtors_ptr
00001ed0   __lock
003f0c92   __nop
003f0c8e   __register_lock
003f0c8a   __register_unlock
003f8000   __stack
00001ece   __unlock
003f0c46   _abort
003f0474   _adc_eoc_isr
003f0a8d   _barraAvanzamento
003f0b0d   _c_int00
003f0a63   _convertiBin
003f0a38   _convertiHex
000001c0   _cosBuf
003f0c66   _delay20us
003f0c69   _delay2cicli
003f0c63   _delay8ms
003f0980   _ev_timer_init
003f040a   _eva_timer1UF_isr
003f03f5   _eva_timer1_isr
003f042e   _eva_timer2_isr
003f043d   _evb_timer3_isr
003f0450   _evb_timer4_isr
003f0c48   _exit
00000006   _faseTensione
00000740   _faseTensioneBuf
003f00cb   _impostaOffset
00000002   _indiceBuf
003f0000   _initAdc
003f082b   _initPLL
003f0ba6   _initSinLut
003f090e   _init_eva_timer1
003f092f   _init_eva_timer2
003f0990   _init_evb_PWM
003f0950   _init_evb_timer3
003f0970   _init_evb_timer4
003f0096   _leggiIngresso
003f072b   _main
00000001   _numRMS
00000034   _offset
003f0ab1   _parkT_tensioni
00000000   _regVal
003f0726   _rsvd_ISR
003f0871   _scia_msg
003f0860   _scia_xmit
003f0886   _scrivi_Uint16
003f08ad   _scrivi_int
003f08dc   _scrivi_long
003f0053   _sequenze_init
003f007b   _settaggioCanaliADC
00000240   _sinBuf
000008c0   _sinLUT
003f0831   _sin_fsg
0000000a   _sommaIntegralePLL
003f0142   _stampaRegistriADC
003f022e   _stampaRegistriLineaADC
003f023f   _stampaRegistriLineaADC_offset
003f0256   _stampaRegistroADC
003f034f   _stampaRegistroADC_offset
00000800   _udBuf
00000680   _ufBuf
003f0c5f   _usDelay
ffffffff   binit
003f795a   cinit
003f0c93   etext
ffffffff   pinit


GLOBAL SYMBOLS: SORTED BY Symbol Address 

address    name
--------   ----
00000000   _regVal
00000001   __TI_args_main
00000001   _numRMS
00000002   _indiceBuf
00000004   _Idc
00000006   _faseTensione
00000008   _Udc
0000000a   _sommaIntegralePLL
0000000c   _Udq
00000010   _Idq
00000014   _Ualphabeta
00000018   _Ialphabeta
0000001c   _Uabc
00000022   _RMS
00000028   _Iabc
0000002e   _RMSbuf
00000034   _offset
00000040   _UbBuf
000000c0   _UaBuf
00000140   _UcBuf
000001c0   _cosBuf
00000240   _sinBuf
000002c0   _UalphaBuf
00000380   _UbetaBuf
00000400   __STACK_SIZE
00000440   _UcBuf2
00000500   _UbBuf2
000005c0   _UaBuf2
00000680   _ufBuf
00000740   _faseTensioneBuf
00000800   _udBuf
00000880   _DevEmuRegs
000008c0   _sinLUT
00000a80   _FlashRegs
00000ae0   _CsmRegs
00000b20   _XintfRegs
00000c00   _CpuTimer0Regs
00000c08   _CpuTimer1Regs
00000c10   _CpuTimer2Regs
00000ce0   _PieCtrlRegs
00000d00   _PieVectTable
00001ece   __unlock
00001ed0   __lock
00001ed2   __cleanup_ptr
00001ed4   __dtors_ptr
00006000   _ECanaRegs
00006040   _ECanaLAMRegs
00006080   _ECanaMOTSRegs
000060c0   _ECanaMOTORegs
00006100   _ECanaMboxes
00007010   _SysCtrlRegs
00007040   _SpiaRegs
00007050   _SciaRegs
00007070   _XIntruptRegs
000070c0   _GpioMuxRegs
000070e0   _GpioDataRegs
00007100   _AdcRegs
00007400   _EvaRegs
00007500   _EvbRegs
00007750   _ScibRegs
00007800   _McbspaRegs
00008000   _InitFlash
00008000   _RamfuncsRunStart
003ec000   _RamfuncsLoadStart
003ec017   _RamfuncsLoadEnd
003f0000   .text
003f0000   ___text__
003f0000   _initAdc
003f0053   _sequenze_init
003f007b   _settaggioCanaliADC
003f0096   _leggiIngresso
003f00cb   _impostaOffset
003f0142   _stampaRegistriADC
003f022e   _stampaRegistriLineaADC
003f023f   _stampaRegistriLineaADC_offset
003f0256   _stampaRegistroADC
003f034f   _stampaRegistroADC_offset
003f03f5   _eva_timer1_isr
003f040a   _eva_timer1UF_isr
003f042e   _eva_timer2_isr
003f043d   _evb_timer3_isr
003f0450   _evb_timer4_isr
003f0474   _adc_eoc_isr
003f05cc   _INT13_ISR
003f05d1   _INT14_ISR
003f05d6   _DATALOG_ISR
003f05db   _RTOSINT_ISR
003f05e0   _EMUINT_ISR
003f05e5   _NMI_ISR
003f05ea   _ILLEGAL_ISR
003f05ff   _USER1_ISR
003f0604   _USER2_ISR
003f0609   _USER3_ISR
003f060e   _USER4_ISR
003f0613   _USER5_ISR
003f0618   _USER6_ISR
003f061d   _USER7_ISR
003f0622   _USER8_ISR
003f0627   _USER9_ISR
003f062c   _USER10_ISR
003f0631   _USER11_ISR
003f0636   _USER12_ISR
003f063b   _PDPINTA_ISR
003f0640   _PDPINTB_ISR
003f0645   _XINT1_ISR
003f064a   _XINT2_ISR
003f064f   _ADCINT_ISR
003f0654   _TINT0_ISR
003f0659   _WAKEINT_ISR
003f065e   _CMP1INT_ISR
003f0663   _CMP2INT_ISR
003f0668   _CMP3INT_ISR
003f066d   _T1PINT_ISR
003f0672   _T1CINT_ISR
003f0677   _T1UFINT_ISR
003f067c   _T1OFINT_ISR
003f0681   _T2PINT_ISR
003f0686   _T2CINT_ISR
003f068b   _T2UFINT_ISR
003f0690   _T2OFINT_ISR
003f0695   _CAPINT1_ISR
003f069a   _CAPINT2_ISR
003f069f   _CAPINT3_ISR
003f06a4   _CMP4INT_ISR
003f06a9   _CMP5INT_ISR
003f06ae   _CMP6INT_ISR
003f06b3   _T3PINT_ISR
003f06b8   _T3CINT_ISR
003f06bd   _T3UFINT_ISR
003f06c2   _T3OFINT_ISR
003f06c7   _T4PINT_ISR
003f06cc   _T4CINT_ISR
003f06d1   _T4UFINT_ISR
003f06d6   _T4OFINT_ISR
003f06db   _CAPINT4_ISR
003f06e0   _CAPINT5_ISR
003f06e5   _CAPINT6_ISR
003f06ea   _SPIRXINTA_ISR
003f06ef   _SPITXINTA_ISR
003f06f4   _MRINTA_ISR
003f06f9   _MXINTA_ISR
003f06fe   _SCIRXINTA_ISR
003f0703   _SCITXINTA_ISR
003f0708   _SCIRXINTB_ISR
003f070d   _SCITXINTB_ISR
003f0712   _ECAN0INTA_ISR
003f0717   _ECAN1INTA_ISR
003f071c   _EMPTY_ISR
003f0721   _PIE_RESERVED
003f0726   _rsvd_ISR
003f072b   _main
003f07d3   _PLL
003f082b   _initPLL
003f0831   _sin_fsg
003f0845   _InitSci
003f0860   _scia_xmit
003f0871   _scia_msg
003f0886   _scrivi_Uint16
003f08ad   _scrivi_int
003f08dc   _scrivi_long
003f090e   _init_eva_timer1
003f092f   _init_eva_timer2
003f0950   _init_evb_timer3
003f0970   _init_evb_timer4
003f0980   _ev_timer_init
003f0990   _init_evb_PWM
003f09b6   _InitSysCtrl
003f09be   _KickDog
003f09c8   _DisableDog
003f09d0   _InitPll
003f09ed   _InitPeripheralClocks
003f0a07   _CsmUnlock
003f0a38   _convertiHex
003f0a63   _convertiBin
003f0a8d   _barraAvanzamento
003f0ab1   _parkT_tensioni
003f0b0d   _c_int00
003f0b51   _InitPieCtrl
003f0b70   _EnableInterrupts
003f0b7c   L$$DIV
003f0b8b   L$$MOD
003f0b99   UL$$DIV
003f0ba0   UL$$MOD
003f0ba6   _initSinLut
003f0bca   I$$DIV
003f0bdb   I$$MOD
003f0bec   ___memcpy_ff
003f0c0d   _InitPieVectTable
003f0c2d   __args_main
003f0c46   C$$EXIT
003f0c46   _abort
003f0c48   _exit
003f0c5f   _usDelay
003f0c63   _delay8ms
003f0c66   _delay20us
003f0c69   _delay2cicli
003f0c6c   U$$DIV
003f0c71   U$$MOD
003f0c77   _RMS_sum
003f0c8a   __register_unlock
003f0c8e   __register_lock
003f0c92   __nop
003f0c93   ___etext__
003f0c93   etext
003f77d0   _PieVectTableInit
003f795a   ___cinit__
003f795a   cinit
003f7ff8   _CsmPwl
003f8000   __stack
003f8400   __STACK_END
ffffffff   ___binit__
ffffffff   ___c_args__
ffffffff   ___pinit__
ffffffff   binit
ffffffff   pinit

[215 symbols]