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C28x to CLA communication use of mutex or locking of data / variables

Rob van de Voort
Intellectual 630 points

Hello,

I have a question regarding C28x to CLA communication and vice versa (CLA to C28x).
on the TMS320 F28069/5

I have the following example data shared between the CLA and the CPU.

struct cpu2cla {
  float a;
  float b;
}

Because the CLA runs at a interrupt loop that 10 times as fast as my C28x interrupt loop i'm  looking for a way to
guard / lock the structure cpu2cla such that the CLA does not read half updated data.

I'm looking for a way to include a mutex variable or something like that that guards the structure
if the C28x is updateing this structure the CLA then internally uses the old value.
If the mutex is unlocked the CLA can lock the structure to read it, and use it in its task by copying the variables to local copies. 

I want to use the Message ram and i'm not looking for a ping pong scheme by switching over the RAM blocks from CLA to CPU
is there another possibility to accomplish the mutex / atomic / guarding operation of data.

Thanks in advance,

Rob

  • 0
    Intellectual 630 points

    In the concerto series there exists something like an IPC flag.


    Is this also available for CLA / C28x communication?

  • 0 in reply to Rob van de Voort
    TI__Mastermind 20850 points

    Unfortunately,  there isnt a flag mechanism available for the CLA and the message rams are write-exclusive to only one of the cores i.e. CLA2CPU can only be written to by the CLA and CPU2CLA by the c28. If you wish to have both cores write to the structure you would have to place them in the data RAMs or have two identical structures in each message RAM and copy data back and forth at the correct instances

  • 0 in reply to Vishal_Coelho
    Intellectual 630 points

    Oke to state more clearly 

    Assume the following example with a larger structure 

    struct test {
      float a,
      float b, 
    ....  
      float z,  
    } 

    Asumme that the CLA TASK 1 is running  
    Assume that while CLA is reading  the C28x interrupt is triggered to update the CLA2CPU struct test

    What can occure is the following: 

    cycle            C28x              CLA 

    1                   -                     read a [OLD]
    2                   -                     calculate 
    3                   write a          calculate
    4                   write b          calculate
    5                   wirte c           read b [NEW]

    etc... 

    What should can i do to make sure mixing OLD and NEW data will never occur. 

    Check on the C28x side  if the CLA Task is running? 
    Can the CLA check if the C28x interrupt is running?  

    I'm using the CLA C compiler to accomplish this;

    For now i have two counters implemented, one from CLA2CPU (c28xcnt) and one from CPU2CLA (clacnt)
    the CLA copies the counter value (from c28xcnt to clacnt)  when it has read (and copied locally) the test structure
    it only reads the structure when the counter values are not equal 

    The C28x updates the test structure when the counter values are equal, and the C28x increments the c28xcnt counter.
    when the variables in the structure have been updated.

    Is this a correct approach or is there an easier way to accomplish this? 

    Thanks in advance,

    Regards Rob

  • 0 in reply to Rob van de Voort
    TI__Mastermind 20850 points

    Hi Rob,

    Rob van de Voort said:
    Check on the C28x side  if the CLA Task is running?

    Yes the C28 can check the Cla1Regs.MIRUN register to see which, if any, task is currently running

    Rob van de Voort said:
    Can the CLA check if the C28x interrupt is running?  

    No- atleast not through any register. I suppose you can set up flags that the c28 can set and the CLA can check before writing

    Rob van de Voort said:

    For now i have two counters implemented, one from CLA2CPU (c28xcnt) and one from CPU2CLA (clacnt)
    the CLA copies the counter value (from c28xcnt to clacnt)  when it has read (and copied locally) the test structure
    it only reads the structure when the counter values are not equal 

    The C28x updates the test structure when the counter values are equal, and the C28x increments the c28xcnt counter.
    when the variables in the structure have been updated.

    Is this a correct approach or is there an easier way to accomplish this? 

    That would work. What you can also do is setup an ISR for CLA Task 1. When task 1 completes its gets into the ISR and updates the struture every n number of iterations. This way you can avoid polling on either core.....just a thought