McBSP over 28335 Data Corruption

Arpan Sadhankar

Other Parts Discussed in Thread: TMS320F28335

Hello,

I am using a setup having one 28335 sending data over McBSP-A using DMA channel-2 to another 28335 who is receiving over McBSP-A, but without DMA.

The sender CPU, say P, is transmitting 15 words packet.

On the reciever CPU, say Q, i am receiving the 1st and 2nd packet properly but later second packet onwards data is received as 0xFFFF.

Ex Sequence:

CPU P transmits - 0x0501 0x000E 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0xABCD

CPU Q receives - 0x0501 0x000E 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF

Can somebody provide inputs where is my copnfiguration going wrong, or what work around can help me..?

Any type of suggestion will be halpful. Thanks in Advance.

- arpan

over 13 years ago

0 Arpan Sadhankar over 13 years ago

Intellectual 335 points

to be exact the CPU that i am using is tms320f28335.

0 Arpan Sadhankar over 13 years ago in reply to Arpan Sadhankar

Intellectual 335 points

My system clk being 120 MHz, LSPCLK is 60 MHz, i have used the CLKDGV contents so as to get the mcbsp clock to

0.5mbps (119), 1mbps(59), 2mbps(29) and 4 mbps (14).

But still i'm facing the same issue.

Any help..??

0 Frank Bormann over 13 years ago in reply to Arpan Sadhankar

Mastermind 7585 points

I guess we will need some more inputs from your side, because without your initialization code it is impossible to help.

First I'd suggest to narrow the problem down. Is the source node transmitting all frames correct? What do you see, when you attach an oscilloscope/logicanalyzer to the McBSP-lines? The fact that you receive the frist 2 frames correct, indicates that your basic McBSP - setup is correct, so there is probably something wrong in the follow-up activities either in the tranmitting or receiving node.

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McBSP over 28335 Data Corruption