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Concerto watchdog for C28

Hi,

We're working on Concerto C2000 family. The two watchdog timers are located on ARM core. Our application is running on DSP core, please advise how to operate watchdog from on DSP (C28) core.  Watchdog  shall cause to  DSP reset.  Can you please explain the behavior on reset? How in dual core environment when ARM is the host and responsible for initial HW initialization, memory and shared memory configuration and pins configuration, restore of Concerto chip is performed?

 

Thank you,

Alla

  • Alla,

    most of the information you are asking for is defined in the system control section (resets chapter and boot ROM chapters) of the device TRM (www.ti.com/lit/spruh22). Please refer to these and let us know if you have any questions.

    Regarding watchDog, there is no generic watchDog on the control subsystem, but there is an NMI watchDog, which starts counting on an NMI trigger. Master subsystem has couple of generic watchDogs. The application can use shared RAM or IPC or Message RAM(s) to communicate between the two subsystems. Control subsytem will have to use one of these mechanisms to let master know how it does and master subsytem will have to check the health of control subsytem appication code by looking at these and pull a reset to either the whole system or just control subsytem depending on how serious the problem is :-).

    hope it helps, please let us know if you have any more questions.

     

    Best Regards

    Santosh

     

     

  • Thank you for reply.

    I understand. C28x is that it has passed the Boot ROM.