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Configuring epwm in 320f28027

toop
Prodigy 210 points

Hi All,

Greetings...  I am new to this forum.

I am working on 320F28027 microcontroller based usb control stic for generating two pulse trains (C1 and C2) of variable frequency as shown in figure below. . I have generated this with epwm module but while updating the frequency it shows some jitter in channel C2 pulse width. I am new to this micro. and not very much familier with epwm. So  any body suggest  a scheme  to generate such wave form using epwm module.    

            __                                   __
 c1      |    |                                 |    |
______|    |___________________|    |______________


                               __                                       __
 c2                         |    |                                     |    |
_________________|    |_____________________|    |______________

 

Parameters:

1. C1 and C2 are at same frequency and variable from 1kHz to 100kHZ
2. Pulse width of C1 and C2 is 3.1uSec, It should be constant for the entire operating frequency range.
3.C1 and C2 are phase shifted by 180 Deg.

 Thanks and regrads

toop

 

// Following are code i used to configure  epwm and changing the frequency

===========================================

EPwm1Regs.TBPRD = 30000; // for 1kHz
EPwm1Regs.CMPA.half.CMPA = 180;
EPwm1Regs.CMPB=(30000-180);
EPwm1Regs.TBPHS.half.TBPHS = 0;  // Set Phase register to zero
EPwm1Regs.TBCTL.bit.PHSEN = TB_DISABLE; // Master module
EPwm1Regs.TBCTL.bit.PRDLD = TB_SHADOW;
EPwm1Regs.TBCTL.bit.SYNCOSEL =TB_SYNC_DISABLE;  // Sync down-stream module
EPwm1Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
EPwm1Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
EPwm1Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1; // Set the clock rate
EPwm1Regs.TBCTL.bit.CLKDIV = TB_DIV1; // Set the clock rate
EPwm1Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO; // load on CTR=Zero
EPwm1Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO; // load on CTR=Zero

EPwm1Regs.AQCTLA.bit.ZRO = AQ_SET;             // Set PWM1A on event A, up count
EPwm1Regs.AQCTLA.bit.CAU = AQ_CLEAR;           // Clear PWM1A on event A, down count
EPwm1Regs.AQCTLB.bit.PRD = AQ_SET;             // Set PWM1B on event B, up count
EPwm1Regs.AQCTLB.bit.CBD = AQ_CLEAR;           // Clear PWM1B on event B, down count

EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Symmetrical mode

=======================================

Code inside the ADC interrupt routine.  Here it some time shows jitter in pulse width

// some computations according to ADC value and update the frequency as shown below

 EPwm1Regs.CMPB = (pwm_period-180);       // Keep the pulse width constant with changing period
 EPwm1Regs.TBPRD = pwm_period;               // Update new period

===========================

 

 

 

  • 0
    Genius 5170 points

    The jitter may result from immediate load of your period register - although by default period shadow load is enabled but please make sure that your period shadow load is enabled so that your new period value is loaded only when counter is zero.

  • 0 in reply to Arefeen
    Prodigy 210 points

    Hi Arefeen Mohammed,

    Thanks for immediate replay.  I have enabled the period shadow load. You can see this from my code. But in actual application I need fast update. So I cannot use shadowing.

    Regrads

    toop

  • 0 in reply to toop
    Genius 5170 points

    Hmmm... yes, shadow load of period is certainly there so now please check the interaction between your interrupt and loading. I am not sure why ADC interrupt is utilized to update compare and period - is it not possible to generate PWM interrupt on period and update all values in that ISR? By the way, I am not sure how non-shadow implementation will work  - I am almost ceratin  non -shdow load will pose more jitters and challenges for the application.

  • 0 in reply to Arefeen
    Prodigy 210 points

    Thanks for your suggestions.

    For your information : ADC   sampling rate is fixed at 200ksps by using EPWM2.  EPWM2 is used only for this purpose.

    On ADC interrupt I am doing some computations and update the frequency of EPWM1. As you have suggested  I will try  PWM interrupt on period and update all values in that ISR. I will let you know once I have done this.

    As I have mentioned our ADC sampling rate is  200ksps and I have used shadow load of period. With frequency of the pulse train ,vary from 1kHz to 100kHz , the period update rate is also changes at same rate. I want a constant and fast update rate for better power supply transient response.

    Do have any comment on the scheme I used to generate this type of pulse trains?. Any alternate technique?

    By the way, I am new to this micro-controller, can you suggest some application note and reference projects for this micro. Also, do you aware of  any configuration software available for this controller.

    Thanks and regards

    Toop

     

     

     

  • 0 in reply to toop
    Genius 5170 points

    Hello

    There are tons of material on C2000 devices and applications for download from TI site - please check out www.ti.com/c2000 Also, the header file installation comes with a set of example projects on various peripherals which can also be a good reference for you. You can also check out the software projects come with the latest C2000 control card based systems.

    By the way, if I understand your setup correctly then your ADC loop is running faster (200ksps) than ePWM1 (between 1kHz and 100kHz) and therefore if you update your PWM1 in ADC loop then I am not sure how the synchronization will work.... most likely your jitter is coming from this mismatch.

  • 0 in reply to Arefeen
    Prodigy 210 points

    Hello

    Thanks for the response. I have changed the adc trigger by epwm2 to epwm1. Now it is not showing any jitter. Thanks for your help. The problem with this is that the update rate changes with PWM frequency.

    I have a observed with ADC. It's out put shows saturated (Read value 4095)  when the input reaches 2.8V. I have called the device_cal() at the beginning.  Any idea about this problem.

    Thanks and regrads

    Toop

  • 0 in reply to toop
    Genius 5170 points

    It is good to know that the jitter is gone [:)]

    You mentioned about saturating at 2.8 input voltage - is this voltage measured at ADC pin or at the input of your analog conditioning circuit? I dont think 2.8 should saturate ADC measurement - have you checked for any noise in analog line? May be analog experts will offer more suggestions for you.

  • 0 in reply to Arefeen
    Prodigy 210 points

    Hi,

     

    The input voltage is measure at ADC pin. I have attached the readings and its graph for your reff.

    I understand  it is a gain error. TI documentation says that all these errors are taken care by  Device_cal()  routine. It says

    "The calibration function Device_cal() writes a factory trim value to correct the ADC full scale gain error into the ADCREFTRIM register. This register should not be modified after the Device_cal() function is called."

    Any idea.

     

    2275.ADC CALIBRATION_eepost.pdf