CPU-Timer1 ISR not executing ( TMS320F2812)

Sangeetha,

Can you resend the attachement? I can't see them in your post. 

Thanks

Noah

An interrupt request ever 1 ns is nonsense.  A device @100 MHz needs 10 ns for a single machine code instruction.

Dear Berhanu,

 I attached with earlier post but may  be my firewall blocked it. sorry for that. I am attaching my projects C files, header file, linker file and gel file again, if  again this time also any issues with attachments please send me your mail id so that i will mail them to you.

As i could not upload .cmd file i copied contents of linker file to a text file and saved with name Timercmd.

list of attached files

#include "Timer.h"
void SetupInterrupts(void);

int MM=0; // varibale which i want to reset it through ISR13

int main(void)
{
    volatile int KeepRunning = 1;
    static int16 x[16];
    int i;
    
    for (i = 0; i <16; i++)
        x[i] = 0;
	MM=1; // set to 1
        
    /*---- Setting up interrupts is processor-specific ----------------------*/
    SetupInterrupts(); 


  while ( KeepRunning )       /* Run until the user sets KeepRunning to 0  */
    {                
        x[0] = i;        
    }

    return 0;
}

void PerformIsr13(void)
{
   		MM=0;  
}

1261.Timer.h

#pragma DATA_SECTION(vec, ".vectors");

#include "Timer.h"

/*-----------------------------------------------------------------------------
* Interrupt vector table - see "CPU Interrupt Vectors and Priorities" in
* TMS320C28x DSP CPU and Instruction Set Reference Guide
-----------------------------------------------------------------------------*/
typedef void (*VECTORS)(); /* Defines a type VECTORS which is a pointer to a */
                           /* function that returns void; takes no arguments */
                             
const VECTORS vec[] =      /* Interrupt vector table (doesn't include RESET) */
{
    UnusedIsr,             /* INT1   - Maskable int 1            */
    UnusedIsr,             /* INT2   - Maskable int 2            */
    UnusedIsr,             /* INT3   - Maskable int 3            */
    UnusedIsr,             /* INT4   - Maskable int 4            */
    UnusedIsr,             /* INT5   - Maskable int 5            */
    UnusedIsr,             /* INT6   - Maskable int 6            */
    UnusedIsr,             /* INT7   - Maskable int 7            */
    UnusedIsr,             /* INT8   - Maskable int 8            */
    UnusedIsr,             /* INT9   - Maskable int 9            */
    UnusedIsr,             /* INT10  - Maskable int 10           */
    UnusedIsr,             /* INT11  - Maskable int 11           */
    UnusedIsr,             /* INT12  - Maskable int 12           */
    Int13Isr,              /* INT13  - Maskable int 13, timer 1  */
    UnusedIsr,                /* INT14  - Maskable int 14, timer 2  */
    UnusedIsr,             /* DLOGINT- Maskable data-logging int */
    UnusedIsr,             /* RTOSINT- Maskable real-time OS int */
    UnusedIsr,             /* Reserved                           */
    UnusedIsr,             /* NMI    - Nonmaskable interrupt     */
    UnusedIsr,             /* ILLEGAL- Illegal instruction trap  */
    UnusedIsr,             /* USER1  - User-defined sw int/trap  */
    UnusedIsr,             /* USER2  - User-defined sw int/trap  */
    UnusedIsr,             /* USER3  - User-defined sw int/trap  */
    UnusedIsr,             /* USER4  - User-defined sw int/trap  */
    UnusedIsr,             /* USER5  - User-defined sw int/trap  */
    UnusedIsr,             /* USER6  - User-defined sw int/trap  */
    UnusedIsr,             /* USER7  - User-defined sw int/trap  */
    UnusedIsr,             /* USER8  - User-defined sw int/trap  */
    UnusedIsr,             /* USER9  - User-defined sw int/trap  */
    UnusedIsr,             /* USER10 - User-defined sw int/trap  */
    UnusedIsr,             /* USER11 - User-defined sw int/trap  */
    UnusedIsr,             /* USER12 - User-defined sw int/trap  */

    UnusedIsr,             /* PIE int 1.1  */
    UnusedIsr,             /* PIE int 1.2  */
    UnusedIsr,             /* PIE int 1.3  */
    UnusedIsr,             /* PIE int 1.4  */
    UnusedIsr,             /* PIE int 1.5  */
    UnusedIsr,             /* PIE int 1.6  */
    UnusedIsr,              /* PIE int 1.7, */
    UnusedIsr,             /* PIE int 1.8  */
};

/*-----------------------------------------------------------------------------
* 32-bit Timer
-----------------------------------------------------------------------------*/
typedef struct
{
    uint32 Timer;        // Timer Counter
    uint32 Period;       // Timer Period
    uint16 Control;      // Timer Control
    uint16 Rsvd;         // Reserved
    uint32 Prescale;     // Timer Pre-Scale
} C28X_TIMER;

 const uint16 Int13_IER = 0x1000;         /* Enable INT13 for IER */


interrupt void UnusedIsr(void)
{
    return;
}

interrupt void Int13Isr(void)
{
    
    PerformIsr13();
}

/*----------------------------------------------------------------------------*/
void SetupInterrupts(void)
{
    
    volatile C28X_TIMER * Timer1 = (C28X_TIMER *)0xc08;
    

    extern cregister volatile uint IER;

    /*-------------------------------------------------------------------------
    * Disable watch dog
    *------------------------------------------------------------------------*/
   asm(" eallow             ; Enable accesses to PIE control registers");
    //WDCR |= DISABLE_WD;
    
    /*-------------------------------------------------------------------------
    * Cause  INT13 every 10 cycles,
    *------------------------------------------------------------------------*/
   

    Timer1->Timer = 10; 
    Timer1->Period = 10; 
    Timer1->Prescale = 0;
    Timer1->Control = 0x4820;

  	
    /* Enable PIE */
   PIECTRL |= 1;   

   asm(" edis               ; Disable accesses to PIE control registers");  
    
    /*-------------------------------------------------------------------------
    * Now enable the interrupts. Setting the IER register
    *------------------------------------------------------------------------*/
	
    IER |=  Int13_IER;   
    asm(" clrc INTM    ; Enable global interrupts"); //only enable global interrupt editable by me.

    return;
}

/* EOF */

/****************************************************************************/
/*   realtime.cmd - Sample linker command file for F28xx devices            */
/*                                                                          */
/*   Description: This file is a sample F2812 linker command file that can  */
/*                be used for linking programs built with the TMS320C2000   */
/*                C Compiler. Use it as a guideline; you may want to change */
/*                the allocation scheme according to the size of your       */
/*                program and the memory layout of your target //.      */
/****************************************************************************/

MEMORY
{
   PAGE 0 : BOOT(R)     : origin = 0x3ff000, length = 0x0FBE
   PAGE 0 : PROG(R)     : origin = 0x3d8000, length = 0x1f80
   PAGE 0 : RESET(R)    : origin = 0x3fffc0, length = 0x2

   PAGE 1 : M0RAM(RW)   : origin = 0x000000, length = 0x400
   PAGE 1 : M1RAM(RW)   : origin = 0x000400, length = 0x400
   PAGE 1 : PIEVT(RW)   : origin = 0x000d02, length = 0xfe
   PAGE 1 : L0L1RAM(RW) : origin = 0x008000, length = 0x2000
}
 
SECTIONS
{
   /* 22-bit program sections */
   .reset   : > RESET, PAGE = 0, TYPE = DSECT
   .pinit   : > PROG,  PAGE = 0
   .cinit   : > PROG,  PAGE = 0
   .text    : > PROG,  PAGE = 0

   /* 16-Bit data sections */
   .const   : > M0RAM, PAGE = 1
   .bss     : > M1RAM, PAGE = 1
   .stack   : > M1RAM, PAGE = 1
   .sysmem  : > M0RAM, PAGE = 1

   /* 32-bit data sections */
   .vectors : > PIEVT,   PAGE = 1
   .ebss    : > L0L1RAM, PAGE = 1
   .econst  : > L0L1RAM, PAGE = 1
   .esysmem : > L0L1RAM, PAGE = 1

   .boot > BOOT
   {
      -lrts2800_ml.lib<boot.obj> (.text)
   }
}

thanks,

Sangeetha

Dear Frank Bormann,

yes your correct there was a typo mistake in my post my interrput is for 100 ns,  because my clock is 100 MHz and i loaded Timer1 with value 10 so for Timer to decrement and  to become zero it takes 10 machine cycles so my interrupt time is 100 ns.

Thanks,

Sangeetha

Sangeetha,

I think the problem might be the way you access the timer control register. You need to access certain bits in certain order

Try using the following procedure. I used the bit fields, but you can access the bits by using masks.

// set up Timer 

CpuTimer1Regs.TCR.bit.TSS = 1;
CpuTimer1Regs.TCR.bit.TRB = 1;
CpuTimer1Regs.TCR.bit.SOFT = 0;
CpuTimer1Regs.TCR.bit.FREE = 0;
IER |= M_INT13;
CpuTimer1Regs.TCR.bit.TIE = 1;

// start timer

CpuTimer1Regs.TCR.bit.TRB = 1;
CpuTimer1Regs.TCR.bit.TSS = 0;

// enable interrupts

EINT;

Thanks

Noah

Even a 100ns period for interrupts is much too fast for the device(see datasheet). The device needs 14-16 clock cycles as hardware interrupt latency before it executes the first instruction of the interrupt service routine. An ISR, written in C, needs 6 more cycles.

Dear Noah,

As a fresh project  I downloaded c/c++ header and peripheral examples from following link just after i posted queries to you, and extracted files for DSP281x_v120. version 

http://10.8.1.6:1812/servlet/com.trend.iwss.user.servlet.sendfile?downloadfile=IRE12709-237420104-388-388.com 

I started using example cpu_timer  "Example_281xCpuTimer.pjt," these project files work with timer0, how ever i  see that the same problem persists i.e ISR of timer0 is not executed even if there is crossover of timer0 from zero.

following are the steps i followed.

1).  I changed CPU clock rate as 100 MHz in file "DSP281x_Examples.h", by taking (considering) clock frequency as 20 MHz and PLL bis are 1010.

2).  Timer Prescale value is  set to zero,  timer period register is loaded with a value of 100000 which corresponds to 1 msec interrupt time.value 100000 is provided by editing function  ConfigCpuTimer( )  input arguments appropriately ( ConfigCpuTimer(&CpuTimer0, 100, 1000) refer this function in "Example_281xCpuTimer.c" ).

3).  Timer is set to a free run by FREE and SOFT bits of timer control register, TIE  is  set and PIEIER1, 6th bit set for timer0 interrupt, IER is set for INT1. refer "Example_281xCpuTimer.c" and  "DSP281x_CpuTimers.c"

4).  I am able to compile and run but could not enter int to ISR and my IFR register always remains at a value of 0000. 

5). I am referring document  "DSP281x_HeaderFiles_QuickStart_Readme.pdf" which says that " Have an F2812 eZdsp or other hardware platform connected to a host with Code Composer Studio installed"  how ever i don't have any hardware to connect to code composer studio ( still under shipping). 

Points that i need to understand:

I). As i don't have any hardware to connect to CCSv3.3 for giving clock input ( simulation input) i am using "Data converter support "which is available under Tools tab of CCS menu options. Is it  always mandatory to have hardware to check ISR routine execution?

II). I am watching timer0 counter value in memory window it decrements by 6 for every debug step i don't know how does this work. I am using animate debug for continuous debug.

III). For timer interrupt to happen is it not sufficient  for timer0 to rollover from zero or it has to reach exactly to zero?  my timer counter reaches to some value near to zero and then reloads to new value. is it correct to set timer control bit as free run with combination of  FREE and SOFT  bits?

IV).  My IER register shows INT1 set, but IFR never responds, why it is happening ?

please help in finding out the real problem.

if you want to simulate you can load timer period register with a smaller value so that you can easily check timer roll over. take function ConfigCpuTimer(&CpuTimer0, 100, 10) this loads timer counter/ period with 0X000003E8 and interrupt time as 10 micro secs.

Thanks,

Sangeetha

 Dear Frank Bormann,

thanks for your response. can you please look at my latest post.

Sangeetha

Hi,

I am still stuck  and unable to execute ISR, but with small addition to the main program i.e (PieCtrlRegs.PIEIFR1.bit.INTx7 = 1;)  now i am able to check most of the steps that happens before ISR is serviced ( please refer spru078f ("system control and interrupt") document chapter 6 , Fig 6-2 "Typical PIE/CPU interrupt response-INTx.y) only  problem is ISR is not getting serviced and once  i reach infinite for loop ( loop for ever ) line in  my main program ( during debug/run)  error message appears as " Error: Can't write to data memory 0x800, check memory config [-2184] " and disassemble code goes to 000000 0000        ITRAP0 .  I tried to fix by taking tips from one of the earlier threads available in the forum link is http://e2e.ti.com/support/microcontrollers/tms320c2000_32-bit_real-time_mcus/f/171/t/21195.aspx?pi33103=1

i tried every thing that is mentioned in above link but could not run/debug into my ISR for Timer0 interrupt. please help me in fixing my problem.

following is the file " Example_281xCpuTimer.c" which has function main() and ISR function.

#include "DSP281x_Device.h" // DSP281x Headerfile Include File
#include "DSP281x_Examples.h" // DSP281x Examples Include File

// Prototype statements for functions found within this file.
interrupt void cpu_timer0_isr(void);

void main(void)
{

InitSysCtrl();    // PLL, WatchDog, enable Peripheral Clocks

 DINT;                // Disable CPU interrupts 

InitPieCtrl();   / / Initialize the PIE control registers to their default state.  The default state is all PIE interrupts disabled and flags are cleared. 

IER = 0x0000; // Disable CPU interrupts and clear all CPU interrupt flags:
IFR = 0x0000;

InitPieVectTable();   // Initialize the PIE vector table with pointers to the shell Interrupt /

EALLOW; 

PieVectTable.TINT0 = &cpu_timer0_isr;  // Interrupts that are used in this example are re-mapped to ISR functions found within this file.
EDIS; 

InitCpuTimers(); // initialize the Cpu Timers

ConfigCpuTimer(&CpuTimer0, 100, 10);   // 100MHz CPU Freq, 1msec second Period (in uSeconds)

StartCpuTimer0();

PieCtrlRegs.PIEIFR1.bit.INTx7 = 1; // added by me                   --------> brake point placed

PieCtrlRegs.PIEIER1.bit.INTx7 = 1;  // Enable TINT0 in the PIE: Group 1 interrupt 7

IER |= M_INT1; 

EINT; // Enable Global interrupt INTM

for(;;);  // Step 6. IDLE loop. Just sit and loop forever (optional):

}

interrupt void cpu_timer0_isr(void)
{
CpuTimer0.InterruptCount++;

// Acknowledge this interrupt to receive more interrupts from group 1
PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;
}

I placed a breakpoint as indicated in above program run and  debug step is done  IFR and IER in registers menu window changed to 0001 and already my timer0 is loaded with 0X3e8 and started decrementing once global interrupter is enabled by clearing INTM bit instruction and is executed,stepping to infinite for loop is done then my PIECNTRL has a value of 0XD4D, PIECNTRL is 0X0001, PIEIER1 is 0X0040, PIEIFR1 is 0X0000 and both IER and IFR are cleared and my status register (ST1) value updated to 8A0B. with all these register values  i could make out that CPU responded to INTM bit clearing and cleared IER, IFR and INTM bit of ST1 register is set to 1, EALLOW=0 , PIEFIR1 is also cleared. Now as per the data sheet program should branch to ISR routine which is not happening in my case. I don't know where i am going wrong can any one help me to solve my problem?  i continue stepping my timer rolls over and TIF flag is set automatically but after that  Error: Can't write to data memory 0x800, check memory config [-2184]  appears and no ISR is executed.

please again note that i donot have any harware board to connect to CCS.

I am using CCS3.3 version and working on TMS320F2812, using Device simualtor F2812.

Thanks,

Sangeetha

Dear Noah,

Can you please suggest me where i am going wrong?, do you need my project files to check?

 Thanks,

Sangeetha

You will need hardware to generate a timer interrupt. As far as I know the simulator does not generate interrupt signals.

Sangeetha,

Please refer to the following post regarding simulators. I was under the impression that you were using an actual board to run your code.

http://e2e.ti.com/support/development_tools/code_composer_studio/f/81/p/210977/754104.aspx#754104

Thanks

Noah

Dear Frank Bormann ,

Thank you very much  for your immediate response. Even for software timers ( liker timer0(PIE) and timer1( CPU) interrupts )is necessary to have hardware? I was under the impression that for software interrupts it may not be the case. Currently i am using trial version of CCSv3.3 till my hardware with licensed software comes ( which is on it ways to my office) and it may take couple of weeks or more. Do you suggest any solution for me till my board comes?. 

Now, i think because of trail version limitation any issues happening to me( because of limited code)?

thanks,

Sangeetha

Dear Noah,

 I browsed the link provided by you, it showed me wiki simulators ( this link may be old as mentioned in community post ), If simulator cannot support interrupts( software interrupts also) is there any tool that i need to figure out from CCSv3.3?  currently i am using free trial of CCS3.3, device simualtor F2812.  In CCS3.3 configuration menu for F2812 there is 1 device simulator and 3 emulators ( which wonot be applicable to me as no hardware board yet).

Are you asking me to look for any other simulators?

Thanks,

Sangeetha

Sangeetha,

I was referring you to a similar post and reiterating the fact that you can only simulate (at least as of now) only CPU instructions and not peripherals.

Thanks

Noah