I Set the GPIO19 as the XCLKIN path,and set the clock of CPUTIMER2 as EXTCLK. This make the CPUTIMER2 counter decrease by XCLK.
The core clock is on-chip 10MHZ OSC1,system clock is 60MHz;
Now,I pass a serial of pluse to CPUTIMER2,the timer counter run correctly;
but if I use a RC filter(R=3KOhm,C=1nf) to filter the pluse,the timer counter run wrong;while I remove the capacitor,it Run correctly again;
is the source of XCLK have some requirement? such as Impedance match?
