In the latest version of sprufb0c (http://focus.ti.com/lit/ug/sprufb0c/sprufb0c.pdf) Table 3-8 shows that a PLLSTS[DIVSEL] = 3 is not allowed for non-zero values of PLLCR[DIV]. I have a design based on the version of this document dated 9/2007 that allows, for example a PLLCR[DIV] = 6 and a PLLSTS[DIVSEL] = 3. The new version of this document says this option is not available. I already have 20 boards built and tested based on this (now invalid?) setting.
What are the implications? - Will they fail over temperature? Will new versions of the die not support this combination of settings? It works fine on the 20 I have tested so far.
Thank you for your response,
Ryan