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Piccolo CLA RAM questions

StephanS
Genius 4087 points
Other Parts Discussed in Thread: TMS320F28065, TMS320F28035, CONTROLSUITE

Hi all,

I have some questions regarding Piccolo 28035 CLA:

1) If I understand the datasheet right, CLA code can only be run from L3 (CLA program RAM). It can be loaded from flash and run in L3

2) There is no different CLA prog region other than L3.

3) I can configure L3 to be accessible by the CPU (MEMCFG.PROGE=0) or by CLA (MEMCFG.PROGE=1).
It can't be accessed by both the CPU and the CLA.
I have to switch the complete L3 RAM (4k) to CPU or CLA.
The same appears for CLA data RAM in L1 and L2.

Are these assumptions correct?
If yes, then this limits the usage of the CLA: I have to spend 4k of the limited 10k Piccolo RAM for CLA program space even if I only use 50 words of it!

I hope there is still some misunderstanding on my side...

  • 0
    TI__Guru* 93090 points

    Stephan said:

    1) If I understand the datasheet right, CLA code can only be run from L3 (CLA program RAM). It can be loaded from flash and run in L3

    Correct.  During debug you can also load L3 directly using the debugger.

    2) There is no different CLA prog region other than L3.

    Correct.

    3) I can configure L3 to be accessible by the CPU (MEMCFG.PROGE=0) or by CLA (MEMCFG.PROGE=1).
    It can't be accessed by both the CPU and the CLA.
    I have to switch the complete L3 RAM (4k) to CPU or CLA.
    The same appears for CLA data RAM in L1 and L2.

    Correct.  I think you know, but just to make sure, all 3 blocks are independent.  So if the CLA doesn't need data memory beyond the CLA to CPU message RAM, you can leave the data RAM assigned to the main CPU.  Or if the CLA only needs 1 data block, you can keep one assigned to the main CPU. 

    I've made sure your questions are covered in the CLA FAQ: http://tiexpressdsp.com/index.php/Control_Law_Accelerator_C2000_CLA_FAQ

    -Lori

     

    Edit: fixed the link to the FAQ

     

     

  • 0 in reply to Lori Heustess
    Genius 4087 points

    Okay, thanks for the clarification - although it is not what I hoped...

    On a memory-restricted system like the Piccolo I hoped to be able to use the CLA and memory more flexible. When using CLA, I will lose at least 40% of the available RAM...:-(

  • 0 in reply to StephanS
    Intellectual 285 points

    I agree with StephenS. Using 4K for CLA code is a lot. I lose 3.5K of RAM which I desperately need. I still do not know how I am going to solve this problem...

    Is there any plan on changing this CLA limitation? Either have an option to run CLA code from some other RAM section (1K or 2K as an addition to 4K if someone needs it), or have an option to reallocate a portion of the 4K RAM L3 for main CPU usage. (I work with Piccolo F28035)

  • 0 in reply to Slavica Golijanin
    Genius 4087 points

    I do not think there are plans for the 28035.

    Have a look at the new Piccolos 2806x - they have more RAM and finer CLA sections.

    Of course they will be more expensive, are not available in TMS yet and are not PIN-compatible...

  • 0 in reply to StephanS
    Intellectual 285 points

    Thank you Stephen. Yes, I've found 2806x, but, as you say, they are substantially more expensive... 

  • 0 in reply to Slavica Golijanin
    TI__Genius 10830 points

    Slavica Golijanin said:
    Is there an equivalent to this chip that still has CLA, but more RAM? The ideal would be pin-to-pin compatible one, from Piccolo series. Of course, what is the price difference?

    StephanS is right.  The next step up for more CLA data space in the Piccolo family is the TMS320F28065.  It has twice as much dual-port single-access random access memory (DPSARAM) for CLA data space.

    CLA data space.

    TMS320F28035 from 0x00 8800 to 0x00 8FFF (page 21 of 157 in the datasheet TMS320F28030/28031/28032/28033/28034/28035 Piccolo Microcontrollers (Rev. E))

    TMS320F28065 from 0x00 8000 to 0x00 8FFF (page 20 of 172 in the datasheet TMS320F2806x Piccolo Microcontrollers (Rev. B))

    Although both the TMS320F28035 and TMS320F20865 share the same 80-Pin PN/PFP package, they are not pin to pin compatible.

    With respect to the price difference, please contact your local technical sales respresentative for a quote.

    I did some more reading internally to see who else had been asking about this problem.  Here are some questions and answers from someone who would like to use more of the CLA's RAM for the CPU.

    Since their Communication protocol implementation and Display module need more RAM, they are running out of RAM in CPU side.

    In F28035, we are having 20KB of RAM,  Out of which 12KB is used by CLA (8KB of CLAPROG L3DPSARAM  + 2 * CLADATA(L1DPSARAM, L2DPSARAM) of size 2KB each).

    I need following clarifications:

    -  Since my customer code doesnt need more Data Memory requirement, Is it possible to configure CLA to use only 2KB of L2DPSARAM for CLA Data Memory ?
    and so that he can use L1DPSARAM for CPU by clearing bit MMEMCFG[RAM0E] = 0

    - Is it possible to reduce size of CLA Prog Memory ? so that rest might be used for CLA data memory.

    - How about the Message RAM ? Is it possible to configure its size ? For Eg, Assuming my CLA Data memory requirement is very low, so i can use 200 bytes for CLA DataRAM and 2 * 26 bytes of RAM for Messages.

    -What is the CLA Section Name in CMD file which are placed in CLADATA Memory?

    Here is the response:

    Yes it is possible to not use one of the RAM;s for the CLA , actually this is the default that the Data RAM;s are not allocated for the CLA, the user needs to do this himself.

    No it is not possible to fragment the CLA program RAM.

    The architecture of the C28x and the CLA is that the read and the writes are put on separate buses. Hence you cannot place data on the program space for the CLA.

    Depending on how the software is written the CLA can execute only using the Data RAM's, please refer to the example of PFC and ACI in controlsuite for a reference example for this,

    controlSUITE\development_kits\HVMotorCtrl+PfcKit_v1.6\PFC2PhiLCLA+ACI\~Docs

    You would note for PFC in this example no data RAM is being used, only message ram is enough.

  • 0 in reply to Jason Work
    Intellectual 285 points

    We are also using CLA message RAM for CLA data only, and both CLA data RAMs are used by CPU. The main problem is that a part of CLA program RAM cannot be utiliazed for CPU usage. In that case we have more then 3K x 16 of RAM waisted. Anyhow, I'll take a look at F28065. Thanks.

  • 0 in reply to Slavica Golijanin
    TI__Genius 10830 points

    Slavica Golijanin said:

    The main problem is that a part of CLA program RAM cannot be utiliazed for CPU usage.

    Thanks for the clarification.  I had misunderstood the question.

    Here's where you can find a detailed explanation of the CLA memory as it related to the TMS320F28035.

    TMS320x2803x Piccolo Control Law Accelerator (CLA) Reference Guide (Rev. B) (page 10 of 155)