TMS320F38335 GPIO's timings

Sergio4668

Hi folks!

I am working on an application which uses TMS320F38335 GPIO pins. In order to watch the GPIO timings performance, I have made the DSP to perform an infinite loop in which an single GPIO pin is put high and inmediately put low. I have tested the timings and I have noticed that the time between a the rising edge of the level on the pin and the falling edge is around 50 ns. I believe it should be faster. The DSP PLL is set at 150MHz. Does anybody know why this cannot meet the expected performance?

Thank you in advance

over 16 years ago

0 Jeff Stafford over 16 years ago

TI__Expert 4595 points

Hi Sergio,

The IO buffers have a limited frequency range. The datasheet lists 25 MHz which is 40 ns per edge (see table 6-12). This is close to the 50 ns you measured.

Jeff

0 Lori Heustess over 16 years ago in reply to Jeff Stafford

TI__Guru* 92750 points

A couple of additional thoughts -

If you do a read-modify-write operation - for example writing to a 'bit' in a SET/CLEAR/TOGGLE register will actually read the register, modify the bit and write it back. This can cause delays since the reads have wait states (2 wait) and you can't read at the same time you write.

Another thought: back-to-back writes to this peripheral frame will introduce a 1 cycle delay.

Lori

0 Sergio4668 over 16 years ago

Prodigy 170 points

Thank you Lori and Jeff,

Your support has been very useful for me. The timings I measured has now sense for me.

Regards,

Sergio

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TMS320F38335 GPIO's timings