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New to DSP BIOS - F2808 "bigtime" example won't run. Question about linker cmd SRAM allocation.

OneHotEngineer
Prodigy 30 points

I'm trying to run the "bigtime" basic example on a F2808 out of RAM.  Can this even be done or do I have to run this example out of Flash?  I'm using the F2812 bigtime example and modified the linker command file H0SARAM location to fit the F2808.  But what's puzzling to me is what to do with the SRAM allocation, which is currently mapped to 0x00100000.  It seems this is external memory for the F2812 which I don't have on my F2808 device board.  Does the DSP BIOS require a lot of RAM to run?

Thanks.

 

  • 0
    TI__Guru* 92130 points

    OneHot,

    I'm not familiar with the example you mention, but there is a really good application note with code that might help you out.  There are DSP/BIOS examples that run from flash and RAM and explanations of where different sections should be allocated to.

    http://www.ti.com/lit/pdf/spra958

    Cheers

    Lori

  • 0
    TI__Guru 64500 points

    OneHotEngineer said:

    I'm trying to run the "bigtime" basic example on a F2808 out of RAM.  Can this even be done or do I have to run this example out of Flash?

    This should be possible.  After compiling the bigtime example targeting the original F2812, I inspected the map file generated to get a feel for how large the application is and how many resources it is consuming.  It consumes a total of 0x73EB (or 29,675 bytes of RAM).  The F2808 has 36K RAM internal available, so in theory it should be possible.  The number quoted includes the large heap defined for the external SRAM memory section.

     

    OneHotEngineer said:

    I'm using the F2812 bigtime example and modified the linker command file H0SARAM location to fit the F2808.  But what's puzzling to me is what to do with the SRAM allocation, which is currently mapped to 0x00100000.  It seems this is external memory for the F2812 which I don't have on my F2808 device board.  Does the DSP BIOS require a lot of RAM to run?

    The F2812 bigtime example places 2 things in the SRAM memory.  A massive heap and the .cinit section.  You will need to move the .cinit section to one of the internal memory segments and perhaps move the heap inside as well.

    You do need to make sure that the linker command file is structured to understand the dual-mapped memory of the F2808.  The L0 SARAM, L1 SARAM and H0 SARAM are not dual mapped on the F2808 and occupy separate spaces.  However, on the F2808, these same memory regions are dual mapped.  Please refer to the F2812 datasheet and F2808 datasheet to see this illustrated.

    MEMORY {
       PAGE 1:   PIEVECT:    origin = 0xd00,         len = 0x100
       PAGE 1:   MSARAM:     origin = 0x0,             len = 0x800
       PAGE 1:   LSARAM:     origin = 0x8000,       len = 0x2000
       PAGE 0:   OTP:             origin = 0x3d7800,  len = 0x400
       PAGE 0:   FLASH:         origin = 0x3e8000, len = 0x10000
       PAGE 0:   H0SARAM:    origin = 0x3fa000,  len = 0x2000
       PAGE 0:   BOOTROM:    origin = 0x3ff000,  len = 0xfc0
    }