• State
  • Locked Locked
  • Replies 3 replies
  • Subscribers 83 subscribers
  • Views 3123 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

SPI to FRAM memory

mfalcone
Prodigy 10 points

Hello,

I am using TMS28015 SPI to read and write to FRAM memory. The TMS28015 is set as a Master using /SPISTE as /CS(chip select). A FRAM read requires that /CS remain low for 16 bits of opcode info + 16 bits

of address sent out. The /SPISTE goes high after 16 bits of transmission. How do I keep it low? I rather not set /CS as GPIO. Also what flags should I test to see that information has been properly transmitted and

received.

  • 0
    Prodigy 90 points

    Hello,

    I too am using the SPI to write to FRAM and had to overcome the same problem.  I am using the FRAMs from Ramtron.  Anyways what you have to do is use the SPI with the FIFO enhancements on.  This will allow you to keep the CS low while to send dummy data, so the clock will continue to toggle to the FRAM, and the FRAM will continue to send back its data.  Becarful to keep track of your RX_FIFO buffer becuase you will overwrite it if you don't read it before it fills.  What I did to make sure the data has been fully transmitted is to check the number of bytes remaining in the TX_FIFO buffer.  If it is zero then I am done transmitting and recieving.

     

    Jorge

  • 0 in reply to Jorge3559
    Genius 5885 points

    Hello Jorge, mfalcone

     

    I am also using ramtrons FRAM, and I am driving the CS signal manualy with apropriate GPIO (I do have some odher peripherals on the same SPI bus, so multiple CS signals were necessary). Of course I can't use FIFO.

     

    Regards, Mitja

     

  • 0 in reply to Mitja Nemec
    Prodigy 90 points

    Hello,

    Have either of you had the experience with these FRAM devices that the serial data coming back from the memory doesn't behave as it should.  For example I am writing the op code to read the status register back from the memory, but I have found that during the read back cycle the memroy just pulls the signal low for the entire time after the op code is recieved.  I have noticed that when I disconect the searil out of the memroy to the microcontroller the devices behaves correctly.  I have tried differnt EZDSPs different microcontroller chips (2808, 2809, 2802) and also different SPI channels SPIA, SPIB, SPID and they all behave the same way.  By the way I also tried different memory chips I am using the FM25L512.  Thanks

     

    Jorge