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TMS320F28335 PWM setup

Anthony Scarnici
Expert 1155 points

Hello Community!

 

So I'm looking to set up the ePWM and the HRPWM on the F28335 for both the ADC and for a variable duty cycle output. Starting with the PWM output, did I read correctly that the duty cycle only has 8 settings about 12-1/2% apart? As for using the ePWM to trigger the SOC on the ADC, I took a look at the example code in the AdcSoc Example file,and modified it. I would like my sample rate to be 40kHz so I left the ADC clock at it's fastest setting, and I assume that changing TBPRD will set the period based on the system clock settings, which should be 150MHz for my application. Therefore, the value I need for TBPRD should be 150MHZ/40kHz = 3750 = 0x0EA6? and how does one determine the value for CMPA? Here's what I came up with, someone please let me know if this looks correct? :

 

   EPwm1Regs.ETSEL.bit.SOCAEN = 1;          // Enable SOC on A group

   EPwm1Regs.ETSEL.bit.SOCASEL = 4;        // Select SOC from from CPMA on upcount

   EPwm1Regs.ETPS.bit.SOCAPRD = 1;         // Generate pulse on 1st event

   EPwm1Regs.CMPA.half.CMPA = 0x03A9;   // Set compare A value 0x0080~0.25(0xFFFF)

   EPwm1Regs.TBPRD = 0x0EA6;                   // Set period for ePWM1 0xFFFF=2.28kHz? ==> 0x0EA6=40kHz

   EPwm1Regs.TBCTL.bit.CTRMODE = 0;      // count up and start

  • 0
    Expert 2115 points

    Hi Anthony,

    All the settings seem all right. But you never know till you test it out!!!

    The CMPA values gives the duty cycle. It's calculation depends on the configuration of Action Qualifier register. Assuming you Set the PWM  o/p on ZRO and Clear it on CAU,  duty cycle(%) = (CMPA * 100/ (TBPRD+1) ) 

    So your settings will be as follows

    EPwm1Regs.AQCTLA.bit.ZRO = 2;           // force EPWM1A o/p high

    EPwm1Regs.AQCTLA.bit.CAU = 1;            // force EPWM1A o/p low.

    // CMPA settings for 25% duty

    EPwm1Regs.CMPA.half.CMPA = 937;      //      3750/4

    // CMPA settings for 50% duty

    EPwm1Regs.CMPA.half.CMPA = 1875;    //      3750/2

    // CMPA settings for 75% duty

    EPwm1Regs.CMPA.half.CMPA = 2812;     //     3750 * 3/4

    and so on....

    All the best,

    Vivek

  • 0 in reply to Vivek Sankaranarayanan98982
    Expert 1155 points

    "You never know till you try" are words that haunt me!! lol. I'm new to this processor. I just graduated college and all we had were 8 bit PIC and AVR, no DSP. I was thust into this world in the last 3 weeks. Some things I can figure out, but the ePWM eludes me a bit.

    For the ADC SOC, is there a minimum duty cycle requirement or will any value send the SOC signal? The example has  EPwm1Regs.CMPA.half.CMPA = 0x0080 with TBPRD = 0xFFFF

    Also, is my assumption about calculating TBPRD correct? SPRUG04A refers to TBCLK but I cannot seem to locate where TBCLK is set. Just want to make sure I understand this properly before I run it up.

  • 0 in reply to Anthony Scarnici
    Expert 2115 points

    Just one suggestion. Try configuring the PWMs alone first and play around with different Duty cycles and Frequencies first. Then try out ADC separately. Then work on integration. It's hard enough getting one module to work correctly. Jumping straight into integration of both might make debugging difficult. Just a suggestion...

    As far as PWMs are concerned, the TBCLK is same as (sysclkout/2) by default. But we can slow it down or boost it to Sysclkout using CLKDIV and HSPCLDIV bits in TBCTL register. Check their descriptions and default value after reset in user guide.

    So finally TBCLK = SYSCLKOUT/ (CLKDIV * HSPCLKDIV)

    Now in up mode:

    Required Time period = (TBPRD + 1) * TBCLK

  • 0 in reply to Vivek Sankaranarayanan98982
    Expert 1155 points

    Thanks Vivek, that makes more sense now. I couldn't find that info in any of the 1500 pages I printed (manuals and users guides). At least it didn't seem as clear in the books. As for the ADC setup, I'm building my program from the Example_28335_AdcSoc.c file that came with the Control Suite, so it already had the PWM and ADC setup done for the example, but as I said, it makes no reference to how they came bout the numbers and what frequency they set eveything up at.

     

    So as I understand it, and correct me if I'm wrong, the PWM period is set from TBPRD which causes it to generate a ramp or triangle wave. The CTRMODE bits determine if it's ramp, triangle or saw wave via "count up" count down" or "count up and down" bits, CMPA and CMPB set the duty cycle for the PWM pulse which is generated by reading the AQCTLA_ZRO and AQCTLA_CAU bits? If I understand that right, I think I'm set. Thanks for the help!!

     

     

    ToNy

  • 0 in reply to Anthony Scarnici
    Expert 1155 points

    Wait- TBCLK is SYSCLKOUT/2? That means that my values for TBPRD are wrong!! ugg.. Ok, back to the drawing board!!!

  • 0 in reply to Anthony Scarnici
    Expert 1155 points

    Also, I asked before - Is there a minimum duty cycle requirement for the PWM to tigger the ADC SOC?

  • 0 in reply to Anthony Scarnici
    Expert 2115 points

    Yup.. Happens.. Understanding a peripheral is almost always about finding the right document for it.. And working your way through the TI documentation can be quite daunting at first.. Luckily it's also quite organised, so it's really easy once you know how to look for information. Just to help you out, here are the links to ePWM and ADC doumentation. (Though I think you already would have seen it.)

    www.ti.com/lit/ug/sprug04a/sprug04a.pdf     (ePWM)

    www.ti.com/lit/ug/spru812a/spru812a.pdf     (ADC)

    As far as ADC is concerned there is no minimum duty cycle requirement. If your CMPA is 0, then every time the counter hits 0, ADC is triggered. Though I suggest you enable ADC start of conversion when counter is PRD. It's always constant and ADC is triggered at specific intervals. Much easier to understand.

    SOCASEL = 2

  • 0 in reply to Vivek Sankaranarayanan98982
    Expert 1155 points

    Thanks Vivek, I really appreciate the info and all the help! I do in fact have almost all the documentation from TI regarding the F28335 DSP printed and bound already. As you said, chasing the information doen is daunting! But this solves my last quandry with the ePWM, Thanks again!! Really Appreciated!!

     

    Tony