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I have probelems with EPWM register configuration

    Hi, I I have probelems with EPWM register configuration while I used 28015 as BLDC control unit.

    For example , while in status S0,  EPWM1B, EPWM2A,EPWM3A,EPWM3B are in low level, EPWM1A is PWM, and EPWM2B is high level.

     As document spru791f. I configure registers as follows

    {

      EPwm1Regs.AQCTLA.bit.CAU = 2;           /* Set high when CTR = CMPA on UP-count    */
      EPwm1Regs.AQCTLA.bit.ZRO = 1;           /* Set low when CTR = Zero       */

      EPwm1Regs.CMPA.half.CMPA = (int16)(Tmp>>15);  /* PWM signal on output A of EPWM1 (Q15 -> Q0)  */ 

      EPwm1Regs.AQCSFRC.bit.CSFb = 1;         /* Forcing a continuous Low on output A of EPWM2    */

      EPwm2Regs.AQCSFRC.bit.CSFA = 1;         /* Forcing a continuous Low on output A of EPWM2    */
      EPwm2Regs.AQCSFRC.bit.CSFB = 2;         /* Forcing a continuous High on output B of EPWM2   */
         

      EPwm3Regs.AQCSFRC.bit.CSFA = 1;         /* Forcing a continuous Low on output A of EPWM3    */
      EPwm3Regs.AQCSFRC.bit.CSFB = 1;         /* Forcing a continuous Low on output B of EPWM3    */

    }

      But in TI example "Trapezoidal Control of BLDC Motors Using Hall Effect Sensors",  the author configure EPWM registers as below:

 {

      EPwm1Regs.AQCSFRC.bit.CSFB = 0;         /* Forcing disabled on output B of EPWM1      */
      EPwm1Regs.AQCTLB.bit.CAU = 2;           /* Set high when CTR = CMPA on UP-count    */
      EPwm1Regs.AQCTLB.bit.ZRO = 1;           /* Set low when CTR = Zero       */
      EPwm1Regs.CMPA.half.CMPA = (int16)(Tmp>>15);  /* PWM signal on output B of EPWM1 (Q15 -> Q0)  */
      EPwm1Regs.AQCSFRC.bit.CSFA = 2;         /* Forcing a continuous High on output A of EPWM1 Set: force EPWMxB output high.   */
         

      EPwm2Regs.AQCSFRC.bit.CSFA = 1;         /* Forcing a continuous Low on output A of EPWM2    */
      EPwm2Regs.AQCSFRC.bit.CSFB = 2;         /* Forcing a continuous High on output B of EPWM2   */
         

      EPwm3Regs.AQCSFRC.bit.CSFA = 1;         /* Forcing a continuous Low on output A of EPWM3    */
      EPwm3Regs.AQCSFRC.bit.CSFB = 1;         /* Forcing a continuous Low on output B of EPWM3    */

}

The registers of EPWM2,EPWM3 are easy to understand, but why author configure EPWM1 register like that? 

 

Regards