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Concerto - copying SW from flash to RAM for running.

Ofer Zilberberg
Prodigy 80 points

Other Parts Discussed in Thread: CONTROLSUITE

I have a problem trying to use the copying method describe by TI in document SPRAA8. i have tried it with the concerto (assuming same core of 28000 should work same as Delfino) and it is not working. The code is not inserted into the RAM according to the mapping and thus program is not in correct order (Linker problem?).

I have traced the problem to be in the CMD file, in the section of the .text in the line that is currently closed (bold):

CMD

.text : LOAD = FLASHA, PAGE = 0
// RUN = RAMS0_3, PAGE = 0
LOAD_START(_text_loadstart),
LOAD_SIZE(_text_size),
RUN_START(_text_runstart)

When i enable this line - i can’t find the other defined section in designed RAM area, and when the line is disabled - i can find other sections in correct position, but of course don’t have all items included in .text.

Please advise a solution.

Regards

Ofer

 

  • 0
    TI__Guru* 93800 points

    Ofer,

    Can you attach your linker .cmd file that is not working along with the .map file generated by the compiler?

    -Lori

  • 0 in reply to Lori Heustess
    Prodigy 80 points

    Hi Lori

     

    Attached find the .MAP and .CMD files.

     

    Ofer

    8156.F28M35x_generic_wshared_C28_FLASH.zip

  • 0
    TI__Guru* 93800 points

    Ofer Zilberberg said:
    When i enable this line - i can’t find the other defined section in designed RAM area, and when the line is disabled - i can find other sections in correct position, but of course don’t have all items included in .text.

    I'm sorry - I do not understand the issue. 

    In the map file I see .text is allocated to flash and run from RAM:

    .text      0    0013e000    00001c08     RUN ADDR = 0000c000
                      0013e000    00000343     F28M35x_Adc.obj (.text)
                      0013e343    000002f7     F28M35x_Ipc_Lite.obj (.text)

    .....

    Which 'other' section are you referring to?  I see ramfuncs, const, etc in flash run from RAM.

    Thank you

    Lori

  • 0 in reply to Lori Heustess
    Prodigy 80 points

    Hi Lori

    In order to run our complete program from ram we are trying to allocate all sections to run from RAM. The problem is that when trying to allocate .text section to run from ram, after compiling and linking when loading the .out file into the memory, instead of cursor positioning on the first line of program in the CCS5 window, we get a massage that there is no "source code" for the memory, in the same time "RUN" button is active instead of awaiting for a "run" command.

    I need help to find:

    1) Why is this line effecting other sector allocation?

    2) How to allocate all sections including .text into desired location as in the old example of the C28000?

     

    May i suggest allowing you to use team-viewer to remotely access the computer to experience the problem?

    Regards

    Ofer

     

  • 0 in reply to Ofer Zilberberg
    TI__Guru* 93800 points

    Ofer,

    I apologize that this slipped through my sights.  Was the issue resolved for you?

    -Lori

  • 0 in reply to Lori Heustess
    Intellectual 815 points

    Hi,

    I have a similar problem, maybe I should not waste too much time on it...

    I want to run my code of the C28 controller subsystem in F28M35 concerto device from RAM with my emulator. If I run it from L and M RAMs with the default RAM linker cmd file it runs without problems and I can load and launch it with my debugger. But if I link it to the shared RAM S0...S3 it starts right away (green "play" in debug window) after loading with the emulator and the program pointer seems to stuck somewhere in the bootrom code?

    If I disassamble to the address 0x0000 it correctly shows me the correct branch to the _c_int00 startup code. Also the branched address there is correct!

    Do I have to do anything before the C28 can access to the shared RAM? I thought this must be done only if I want to write something to it?

    OK, I will go for the next step and boot the C28 from the master M3 with IPC, maybe it works that way...

    I have included the linker cmd and map files...

    1781.F28M35x_C28_SRAM.zip

    Regards,
    Stefan

  • 0 in reply to Stefan Buechner
    Intellectual 815 points

    All right, the TRM says in chapter 5.1.1.2 that there is no write/fetch access of the C28 on shared RAM S0..S7 if the corresponding bit the CSxMSEL is not set.
    I guess I can set it only by the master subsystem so I need a program running from there... no standalone test possible.

  • 0 in reply to Stefan Buechner
    TI__Guru* 93800 points

    Stefan Buechner said:
    Do I have to do anything before the C28 can access to the shared RAM? I thought this must be done only if I want to write something to it?

    The shared RAM belongs to the master subsystem at boot.  If you want the 28x to be able to use it then the M3 will need to grant this permission first.  There is a RAM management example in the dual core examples folder in controlSUITE (C:\ti\controlSUITE\device_support\f28m35x\<version>\F28M35x_examples_Dual)

    There is also a setup_m3 example that passes pretty much everything over to the 28x.  This can be found in the control examples folder.

    Lori

  • 0 in reply to Lori Heustess
    Intellectual 815 points

    Lori,

    thanks for the reply, especially the link of the other post was helpful. I actually searched in the forum but missed that thread.

    I already looked at the examples you mentioned. I just was wondering if it was possible to run the C28 out of this shared RAM section with the help of the emulator.
    Normally the C28 can't run by itself but has to be started by the M3 master subsystem. But with the help of the emulator I'm able to do run the C28 as standalone system as well.

    Stefan

  • 0 in reply to Stefan Buechner
    TI__Guru* 93800 points

    Stefan Buechner said:
    I just was wondering if it was possible to run the C28 out of this shared RAM section with the help of the emulator.

    Stefan,

    Somehow you need to pass permission to the C28x to execute out of the shared RAM.  The example we have today is to run the setup_m3 example.   After you have done this once you shouldn't have to worry about the M3 side while you debug the 28x code until you power down. 

    The other option would be to setup a gel file to write to the configuration registers.  This would need to be done on the M3 side as well and you could write to the registers on connect. But it still requires you to connect the M3 but would remove the requirement of executing a code.  I don't have a ready made example, but here is a wiki article that talks about the gel files if you are interested in trying this method.   http://processors.wiki.ti.com/index.php/GEL

    -Lori