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F280x/F2823x/F2833x: Question on Power Sequencing

Andreas Goergner
Intellectual 1025 points

Dear Champs,

In the datasheets of the F280x/F2823x/F2833x no information on rampings of the voltage supplies (VDD and VDDIO) can be found. A customer has a design in which both supplies can ramp very slow (application is solar inverters; voltages are depending on weather conditions). In any case, VDD is ramped prior to VDDIO, and reset signals are generated according to the recommendations.

Do we have any additional information, experiences or recommendations for slow ramps on VDD and VDDIO?

 

Thanks in advance!

Best regards,

Andreas

 

  • TI__Intellectual 2690 points

    Andreas -

    In both the 2833x/2823x data sheet and the 280x data sheet, the section on Power Sequencing is in the Electricals chapter.  Section 6.8 is the section on Power Sequencing with the requirements for VDD and VDDIO. Is this the information you are looking for?

    -Chrissy

     

  • in reply to CChang
    TI__Intellectual 1025 points

    Hi Chrissy,

    Sorry for being unclear - I actually would like to get a feeling for ramp speeds of VDD and VDDIO. We do not specify it in the datasheet, so I was wondering if there is some experience on this. A customer of mine is ramping the voltages very slow (can be hours), and since other microcontrollers have an issue with such a procedure I just wanted to get clarification that F280x/F2823x/F2833x doesn't.

     

    Regards,

    Andreas

  • in reply to CChang
    TI__Expert 8500 points

    Andreas,

    On the F280x/F2823x/F2833x devices they should be fine. On the old LF240xA devices there is a note in the datasheet saying "For applications that involve millions of power cycles, it is recommended that VCCP be powered after VDD". This was due to a worry that if the flash was powered up before the control signals it could affect the contents of the flash. For the F281x our power sequencing specifically keeps the flash in reset during powerup, however the concern then became oxide integrity once there was a separation of >2.5v between VDDIO and VDD. So, on the F281x devices there is a requirement that VDD ramps within 10ms after VDDIO ramps. However, on the newer devices, where we added on-chip hardware to allow VDD to be ramped simultatneously or before VDDIO, there should not be a >2.5v separation between the rails, so this stops being a concern. As far as I know there is no requirement to ramp quickly on these devices. Having said that I'll also say that it is impossible for us to validate or even speculate about every possible powerup condition.

    Regards,
    Dave Foley

     

  • in reply to David Foley
    TI__Intellectual 1025 points

    Hi Dave,

    Thank you very much, this is good information.

     

    Best regards,

    Andreas