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Highest priority interrupt latency

Guru 20045 points
Other Parts Discussed in Thread: TMS320F28335

Hello,

The multiday workshop (http://processors.wiki.ti.com/index.php/C2000_Archived_Workshops - section 4) material for TMS320F28335 describes the interrupt latency to be 14 cycles for internal interrupts and 16 cycle for external interrupts.

Is there anyway it could be less than these values?

The reason I ask is that my code will be depending on the interrupt latency delay.

Also, what document describes the interrupt process?

Thanks,

Stephen