I'm trying to understand why I'm not seeing an ADC SOC pulse on the very first rising edge of an ePWM signal in the 2809 DSP.
I'm using the ePWM module on the 2809 to produce an 80 kHz PWM signal, at the rising edge of which is an ADC SOC pulse. The ADC samples two inputs, and then the ADC EOS kicks off an ISR in which I run some control algorithms. As the attached scope trace shows, I am not seeing the ADC SOC signal on the very first PWM pulse, but I see it always thereafter. In the trace, the top signal is the /ADCSOCAO signal from the DSP, the middle signal is the 80 kHz PWM, and the bottom signal is a GPIO pin I toggle at the beginning and end of my ADC ISR. I am not expecting to see the initial pulse of the middle signal without corresponding pulses of the top and bottom signals.
Am I seeing the expected behavior, or could I have something wrong with my configuration? The order in which I initialize things is to set up the ADC first, then set up the PWM module, then enable the clock to the PWM module. This makes sense to me; the ADC should be sitting there waiting for an initial SOC pulse, and once the PWM is configured and gets its clock I'd think it would generate it. I need to make sure that a pulse of the middle signal does not occur without a corresponding ADC interrupt.
Thanks for any insight,
Jon
