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Shared memory in Concerto

Other Parts Discussed in Thread: SYSBIOS

Hi,

I created a project based on Sys/Bios/Generic Examples/Memory example with platform ti.platforms.concertoC28:F28M35M52C1 (CCS 5.1.1, SYS/BIOS 6.33.3.33).
Is it possible to use in the project S07SHRAM memory, that defined in   F28M35M52C1.cmd file?  ( S07SHRAM    : origin = 0xC000,   length = 0x8000)
 when I change the following lines in F28M35M52C1.cmd:
   .stack      : >  M01SARAM | L03SARAM PAGE = 1
    .ebss       : > M01SARAM | L03SARAM PAGE = 1
  to :
 .stack      : > S07SHRAM | M01SARAM | L03SARAM PAGE = 1
    .ebss       : >S07SHRAM | M01SARAM | L03SARAM PAGE = 1

project doesn't run.

Could you explain what is the problem here? Why i can not put stack or ebss on the shared memory?

Thanks, Sabina

 

  • Maybe your question should be in this forum:

    http://e2e.ti.com/support/microcontrollers/tms320c2000_32-bit_real-time_mcus/default.aspx

    Cheers!

  • Hi Sabina,

    Shared RAMs (S0-S7) are shared between master subsystem and control subsystem but by default master subsystem has ownership of these memories which means control subsystem CPU (C28x) can only read to these memories but can't write. Master subsystem code need to change the ownership of these memories to control subsystem by setting the bits in MSxMSEL register and then only C28x CPU can write to these memories.

    Please refer "Internal Memory" section of TRM to get more detail on this.

    Regards,

    Vivek Singh 

  • Hi,
    Thanks, now it work properly.

    could we use shared memory for data only

    .ebss       : > S00SHRAM | M01SARAM | L03SARAM  PAGE = 1
    .esysmem    : > S00SHRAM | L03SARAM | M01SARAM  PAGE = 1
    .cio        : > S00SHRAM | L03SARAM | M01SARAM  PAGE = 1

    or we can use it for stack also:
     .stack      : > S00SHRAM  | L03SARAM PAGE = 1

    Thanks, Sabina

  • Hi Sabina,

    It can be used for data as well as stack.

    Regards,

    Vivek Singh

  • Hi Vivek,

    we tried to use shared memory for taskStack - put one task in this section. 
      .stack      : > L03SARAM PAGE = 1
      .taskStack  : > S01SHRAM  | S02SHRAM PAGE = 1
     .ebss       : > S00SHRAM | L03SARAM | M01SARAM   PAGE = 1
     .esysmem    : > S00SHRAM | L03SARAM | M01SARAM   PAGE = 1
     .cio        : > S00SHRAM | L03SARAM | M01SARAM  PAGE = 1

    but in this case application doesn't run:  We get the followin error on the running:

    [C28xx_0] ti.sysbios.family.c28.Hwi: line 952: E_unpluggedInterrupt: Unplugged interrupt flagged: intr# 32
    [C28xx_0] xdc.runtime.Error.raise: terminating execution

    in rov/bios/scan for errors:
    All ROV views have been run and no errors were encountered. In BIOS, this includes a check of the System stack usage and all Task stacks.

    could you help us to undestand what is the reason of this error?

    thanks,Sabina

  • Hi,

    Could somebody answer on our question? we can not continue without shared memory using.

    Thanks,Sabina

  • Generally in an Asymmetric Multi-Processor system the memory should only be used for data passing.

    In his reply above he mentioned that you could "switch bits" to pass write control (on the fly???) to one processor or another. Is that correct?

    I am not sure I understand what this "task passing: is about... Maybe it really is just data specifying what should be done... Beyond that I am not sure that much more innovation would be wise.

    If you are going beyond the obvious you are passing into "Science" as opposed to engineering -- is that the intent?

    Anyway -- not sure that my rambling helps.

    Start a new thread since this really does appear to be a completely new question -- at least to me -- whether you agree or not. Then I won't be copied any more!!!

    ASMP systems are fun -- aren't they?

  • I should add another note -- whether you think it is helpful or not...

    Separate your questions out...

    You are asking questions about:

    OS theory

    The Compiler and Linker

    Computer Science

    Technical Operational functions of the particular processor.

    Admittedly the boundaries are not always clear -- but there are other forums that deal with some of these issues individually -- like SysBios on operating systems etc. The new TI RTOS.

    Based on your questions I am guessing that you have not written an OS before or you might not put your questions the way you do. Am I right on this? Because the questions really are about "How do I write an OS to do xxxx" -- again you may not see this -- but I see it this way...

    ...Just someone who has written OS's and the occasional CLI, compilers and stuff...