Hi,
I am using the McBSP in SPI mode on f28335 DSP. The word length is 32bit. DMA is setup to perform multiple words transmission.
DSP works as a master to get data from FPGA.
One thing bothers me is that when McBSP works in SPI mode, CLKX always stops and FSX returns to the inactive state after finishing transferring each 32-bit word. This leads to a transmission pause between two words transfer. The pause is approximately 3 CLKX periods seen from the silliscope.
As a slave, FPGA sends out data using a circular buffer. The pauses in McBSP will probably cause a data loss in FPGA if not handled properly. My question is: is the pause length constant? Will it change because of the environment? Or is there any way to remove the idle time after each packet transfer?
Thanks!
regards,
Weiwei