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f28m35 watchdog1

George Cerff
Prodigy 140 points


I have set up watchdog 1 to reset the processor after a period of 1ms (500us in WDTLOAD). I then reload the WDTLOAD register everytime I 'kick' the watchdog.

The watchdog timer does not reload after the initial setup (I am leaving the protection off for debugging).

If I swop to watchdog 0, the code works fine, although it seems like it is running from a much faster clock?

(Solved the faster clock - Watchdog1 runs off OSCCLK and Watchdog0 off M3SSCLK!)

I have observed the timing delay for writes to watchdog 1 by physical delays as well as polling for WRC - through the debugger I see that WRC does not return to 1 after the initial setup?

  • 0
    Prodigy 140 points

    I have a solution to the problem with WDT1.

    If you reset the Watchdog interrupt via a write to the WDTICR, the initial setup value in the WDTLOAD is loaded into WDTVALUE and the watchdog counts down from there again.

    I could not get the reload working by a direct write to WDTLOAD in WDT1 - which does work with WDT0.