Other Parts Discussed in Thread: TMS320F28335
I am working on a CAN application using the TMS320F28335. My question with regards to the CANRML register is what logic is used by the chip to detect mailbox overwrite. From what I can guess there are two options:
1) A new message arrives in the mailbox prior to any read access being made from that mailbox by the application code. This would require some state machine in the silicon which track reads of the mailbox data.
2) A new message arrives in the mailbox prior to the CANRMP register being cleared from the previous write in that mailbox. This would would require a state machine in silicon that simply checks the RMP bit before writing to the mailbox.