Branch to SCI_boot address from Flash behaves differently than a SCI-GPIO boot? Why?

Henry

when calling back to SCIBoot in ROM from your applicaiton, what is the status of clock configuration? is PLL enabled etc etc? if yes, then probably the autoBaud is not getting locked properly. Quick check would be try disabling PLL and set the clock dividers to as boot ROM had/does during the native call to SCIBOOT from ROM.

Best Regards

Santosh

Santosh,
Good idea, I have disabled PIE and reset sys clks to “initial state” and went a step further to reset both SCI regs and the stack pointer using the following code below. I am using the “initial state” as the debugger finds the code when entering SCI-GPIO boot. So what I see as the “initial state” through the eyes of the debugger may not actually be the SCI-GPIO boot expected state. None the less, as debugger sees things, registers are set up the same branching to flash as reset using SCI-GPIO boot. However C2Prog still hangs up at the same spot after beginning the boot load sequence after autobaud. Can you think of anything else that I might be missing?

//%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
//Prepare For SCI BootLoading
//%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
 EALLOW;
  
 DINT;
 PieCtrlRegs.PIECTRL.bit.ENPIE = 0; // Disable the PIE  
 EDIS;    
    
 EALLOW;
 SysCtrlRegs.WDCR = 0x0068; //Disable Watchdog as in bootcode
        
 //Disable and reset SCI
 SciaRegs.SCICCR.all = 0x0000;
 SciaRegs.SCICTL1.all = 0x0000;
 SciaRegs.SCICTL2.all = 0x00C0;
 SciaRegs.SCIRXST.all = 0x0000;
 SciaRegs.SCIRXBUF.all = 0x0000;
 SciaRegs.SCIFFTX.all = 0xA000;
 SciaRegs.SCIFFRX.all = 0x201F;
 SciaRegs.SCIFFCT.all = 0x0000; 
 SciaRegs.SCIPRI.all = 0x0000;  

//Set System Regs clks to reset state    
SysCtrlRegs.XCLK.all = 0xF010;
       
// Before setting PLLCR turn off missing clock detect logic 
  SysCtrlRegs.PLLCR.all = 0x0000;
  SysCtrlRegs.PLLSTS.all = 0x0005;
        
  SysCtrlRegs.HISPCP.all = 0x0001;
  SysCtrlRegs.LOSPCP.all = 0x0002;  
  SysCtrlRegs.PCLKCR0.all = 0x0000; 
  SysCtrlRegs.PCLKCR1.all = 0x0000;
  SysCtrlRegs.LPMCR0.all = 0x00FC;
  SysCtrlRegs.PLLCR.all = 0x000A;
  SysCtrlRegs.WDCR = 0x0068; //Disable Watchdog as in bootcode
   EDIS;
   
 EALLOW;
 asm(" MOV SP, #0x0408");    // Move stack pointer as SCI_boot
  
 entry = (void(*)())(boot_addr); // Boot address: unsigned long boot_addr = 0x003ffd63;
  
 entry();

thank you!
Henry

Henry,

I thought that would be it. Its wierd it still doesn't work. Lets re-check or do the below steps to isolate the situation better.

> Have debugger connected, erase flash - so that you don't have any application running any initializing the system by the time you connect JTAG. if you don't want to erase flash, but check this out with a simple RAM based applicaiton, you need set the boot mode to WAIT_BOOT, then connect the debugger.

> Bulld and load application to flash/RAM  (where is the stack located, pay attention to it but I wouldn't be worried for the scope of debug. you might have to worry about it once you get this working))

> after you enter main in your application, don't do anything (literally don't put any other code yet) but simply disable WDOG and call back or branch to SCI_BOOT function in ROM.

> before you step through main() in your application, perform 'ADD SYMBOLS" and add boot ROM COFF symbols to the existing project in CCS. This will help you debug the ROM code with symbols (you can point to ROM sources directlry in ControlSuite if CCS asks for it)

> once you step into SCI_BOOT in boot ROM,  put a break point at below line in source, does it hit the break point, if it does then AutoBaud locked.  Then step into the function SCI_GetWordData...does it return or is it hanging over here for eternity?

during the last step you might have to restart and play with break points to get the CPROG communicate with device/DSP correctly. The SCIBOOT normally echoes each byte it receives for error checking, I'm not sure if CPROG waits for the bytes to be echoed or just simply dumps the bytes without waiting for proper sync. if later then you would want CPROG to be the right bytes while you wait for them with break points.

if (SCIA_GetWordData() != 0x08AA) return FLASH_ENTRY_POINT;

Best Regards

santosh

Santosh has suggested some great debug steps.

Only other thing that came to my mind:

Did you by chance execute through the SCI ROM code before the applicaiton called back in?  I ask because there is an errata  "SCI: Bootloader Does Not Clear the ABD Bit After Auto-Baud Lock ."  on the 280x that can cause the a branch back into the loader to fail.  i.e (boot SCI -> flash/ram -> call back to loader)

To work around this you would clear ABD before calling back into the ROM loader.

More info here: www.ti.com/lit/SPRZ171 

Regards

Lori

also, please refer to, it might be of some help.

http://e2e.ti.com/support/microcontrollers/c2000/f/171/p/234149/864922.aspx#864922

Best Regards

santosh

Hi Henry,

I am having the same issue as you had... Did you manage to make it work?

Any help would be much appreciated :).

Thanks a million.

Javier 

I think I might throw a bit more light into this and hopefully, we can find a solution.

The autobaud lock function works perfectly. I tried with different PLLs and it always receive a character "A" whilst the SCILBAUD changes according to the PLL frequency used.

Furthermore, the execution of the SCI_boot function continues, and it goes trough the following code with no issues:

if (SCIA_GetWordData() != 0x08AA) return FLASH_ENTRY_POINT;

ReadReservedFn();

EntryAddr = GetLongData();

The problem seems to be then within the CopyData() function.

I performed different tests and the beginning of the function seems to be fine. I am able to read succesfully the first block (first iteration of the loop:

for(i = 1; i <= BlockHeader.BlockSize; i++)
{
wordData = (*GetWordData)();
*(Uint16 *)BlockHeader.DestAddr++ = wordData;
}

After this point I completely lose track of the execution (I am not able to see how many blocks are received because C2Prog crashes) However, I have noticed looking at the status of the SCI registers that the reason why it hangs within the  "SCI_GetwordData "(pointed by GetWordData I believe) is becuase there is a Framing Error (FE bit is one as well as BRKDT and RXERROR bits)

What I don't understand is why the communication starts working and then all of a sudden stops....

Any ideas?

Thank you very much,

Javier

Javier,

could you try with a slower baud rate from C2prog? also check the START/STOP, Data and parity configurations are same on both Host and MCU.

if you are trying to do flash programming, make sure whatever is downloaded on to the device from C2Prog doesn't muck with what is running on the device as far as memory locations are concerned.

Best Regards

Santosh

Hello,

I am trying to branch to SCI_boot address from Flash (without the use of the GPIO selector) (as it was explained in the linked post). I would like to know if you finally managed to use C2Prog to succesfuly program the flash. Did you make any progress?

Thank you in advance,

Pablo

I'll second that, I'd like to see if anyone got it to work.  I haven't been able to either.  Ideally we want to have the CPU in the same state as if it had just reset and arrived to SCI_Boot as if the 2x boot GPIOs were configured to do so.

For those who are interested, I have gotten this to work on F28035.  The preparation Henry suggested was on the right track, but I think we have to be careful before we change PLLCR and DIVSEL.  We have to change them to the state they would be in if we had just reset.  We can't just branch to SCIBoot in the BootROM, first we have to mimic InitBoot, then instead of branching to SelectBootMode, we branch to SCIBoot in the BootROM.  Before we do any of this, we need to set SCI registers to their reset values, then change PLLCR and DIVSEL to their reset values.  There are also some things in SelectBootMode.c that happen before SCIBoot() is called (i.e. changing DIVSEL to /1).  We want to mimic the BootROM source as much as possible, because that's what comes loaded into the BootROM section.  Figure 26 in sprugl8c demonstrates the proper order in which to change PLLCR.

I think this what was tripping up C2Prog.  It expects you have just reset and you are not running at full speed which will affect your communication.  Now, once our device is running and we want to enter into SCI boot mode as if the GPIO pins were configured as so, we would do something like this:

            DINT;
            PieCtrlRegs.PIECTRL.bit.ENPIE = 0;
            SciaRegs.SCICCR.all = 0x0000;
            SciaRegs.SCICTL1.all = 0x0000;
            SciaRegs.SCICTL2.all = 0x00C0;
            SciaRegs.SCIHBAUD = 0x0000;
            SciaRegs.SCILBAUD = 0x0000;
            SciaRegs.SCIFFTX.all = 0xA000;
            SciaRegs.SCIFFRX.all = 0x201F;
            SciaRegs.SCIFFCT.all = 0x0000;
            EALLOW;
            SysCtrlRegs.PLLSTS.bit.MCLKOFF = 1;
            SysCtrlRegs.PLLSTS.bit.DIVSEL = 0;
            SysCtrlRegs.PLLCR.bit.DIV = 0x0000;
            while(SysCtrlRegs.PLLSTS.bit.PLLLOCKS != 1);
            DELAY_US(500L);
            SysCtrlRegs.PLLSTS.bit.DIVSEL = 3;
            SysCtrlRegs.PLLSTS.bit.MCLKOFF = 0;
            SysCtrlRegs.PCLKCR0.bit.ADCENCLK = 1;
            (*Device_cal_func_ptr)();
            SysCtrlRegs.PCLKCR0.bit.ADCENCLK = 0;
            SciBoot();

where SciBoot() is a call to a file I created called SciBoot.asm

    .global _ExitBoot
    .global _SciBoot


    .sect "securebootfuncs" ;secure RAM location

;-----------------------------------------------
; _SciBoot
;-----------------------------------------------
;-----------------------------------------------
; This function performs the initial boot routine
; for the boot ROM.
;
; This module performs the following actions:
;
;     1) Initalizes the stack pointer
;     2) Sets the device for C28x operating mode
;     3) Calls the main boot functions
;     4) Calls an exit routine
;-----------------------------------------------


_SciBoot:

; Initalize the stack pointer.

    MOV SP, #0x004 ; Initalize the stack pointer

; Initalize the device for running in C28x mode.

    C28OBJ       ; Select C28x object mode
    C28ADDR      ; Select C27x/C28x addressing
    C28MAP       ; Set blocks M0/M1 for C28x mode
    CLRC PAGE0   ; Always use stack addressing mode
    MOVW DP,#0   ; Initialize DP to point to the low 64 K
    CLRC OVM

; Set PM shift of 0

    SPM 0

; Go to SCIBoot in BootROM
    LCR  0x3ff7dd

; Cleanup and exit.  At this point the EntryAddr
; is located in the ACC register
    BF  _ExitBoot,UNC



;-----------------------------------------------
; _ExitBoot
;-----------------------------------------------
;-----------------------------------------------
;This module cleans up after the boot loader
;
; 1) Make sure the stack is deallocated.
;    SP = 0x400 after exiting the boot
;    loader
; 2) Push 0 onto the stack so RPC will be
;    0 after using LRETR to jump to the
;    entry point
; 2) Load RPC with the entry point
; 3) Clear all XARn registers
; 4) Clear ACC, P and XT registers
; 5) LRETR - this will also clear the RPC
;    register since 0 was on the stack
;-----------------------------------------------

_ExitBoot:

;-----------------------------------------------
;   Insure that the stack is deallocated
;-----------------------------------------------

    MOV SP,#0x004

;-----------------------------------------------
; Clear the bottom of the stack.  This will endup
; in RPC when we are finished
;-----------------------------------------------

    MOV  *SP++,#0
    MOV  *SP++,#0

;-----------------------------------------------
; Load RPC with the entry point as determined
; by the boot mode.  This address will be returned
; in the ACC register.
;-----------------------------------------------

    PUSH ACC
    POP  RPC

;-----------------------------------------------
; Put registers back in their reset state.
;
; Clear all the XARn, ACC, XT, and P and DP
; registers
;
; NOTE: Leave the device in C28x operating mode
;       (OBJMODE = 1, AMODE = 0)
;-----------------------------------------------
    ZAPA
    MOVL  XT,ACC
    MOVZ  AR0,AL
    MOVZ  AR1,AL
    MOVZ  AR2,AL
    MOVZ  AR3,AL
    MOVZ  AR4,AL
    MOVZ  AR5,AL
    MOVZ  AR6,AL
    MOVZ  AR7,AL
    MOVW  DP, #0

;------------------------------------------------
;   Restore ST0 and ST1.  Note OBJMODE is
;   the only bit not restored to its reset state.
;   OBJMODE is left set for C28x object operating
;   mode.
;
;  ST0 = 0x0000     ST1 = 0x0A0B
;  15:10 OVC = 0    15:13      ARP = 0
;   9: 7  PM = 0       12       XF = 0
;      6   V = 0       11  M0M1MAP = 1
;      5   N = 0       10  reserved
;      4   Z = 0        9  OBJMODE = 1
;      3   C = 0        8    AMODE = 0
;      2  TC = 0        7 IDLESTAT = 0
;      1 OVM = 0        6   EALLOW = 0
;      0 SXM = 0        5     LOOP = 0
;                       4      SPA = 0
;                       3     VMAP = 1
;                       2    PAGE0 = 0
;                       1     DBGM = 1
;                       0     INTM = 1
;-----------------------------------------------

    MOV  *SP++,#0
    MOV  *SP++,#0x0A0B
    POP  ST1
    POP  ST0

;------------------------------------------------
;   Jump to the EntryAddr as defined by the
;   boot mode selected and continue execution
;-----------------------------------------------

    LRETR

;eof ----------

This was taken from InitBoot.asm in the 2803x BootROM source.  A few things to note here is that MOV SP,#__stack was changed to MOV SP,#0x004 since in the boot ROM map file, the stack for the boot ROM (not the stack for your application), is located at 0x0004.   Also LCR _SelectBootMode was changed to LCR 0x3ff7dd since 3ff7dd is the location of SCIBoot in the Boot ROM (according to the .map file).

With these tweaks, I am able to put my device into SCI boot mode on the fly and then use C2Prog to reprogram it.