This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

28m36 about the Shared RAM

Hi,

I was taking a look at the shared memory and to the RAM_Management example.

About the SxRAM, the M3 can be the master (Write and Read) and so the C28 could only read. Or M3 could give access to C28 for a SxRAM which will become the master and M3 could only Read. Did I understand well?

Is there a way to have both core Writing and Reading in a Shared RAM section?

Thank you for your helping,

Marc

  • Hi Marc,

    Your understanding is correct. Only master has write access to the shared RAM and other master has only read access. Write to same shared RAM from M3 as well as C28 can't be enabled.

    Regards,

    Vivek Singh