TMS320F28069 SPI master communication

Hi Hamid,

      Are you transmitting dummy bytes as well from master (TMS320F28069)to slave (MSP430) ?

Hi Bhuvan/Hamid,

I guess he might not be transmitting dummy bits... BTW did you try sending only one character at a time?

Regards,

Gautam

Hi,

Actually, I am transmitting commands to the MSP430 from master side. On the scope, I can see the clocks running and MSP430 reply's frame being sent but, The MSP430 response to the the Master commands is either one bit shifted to the right or one bit shifted to the left.

Regards,

Hi,

You are experiencing a synchronization problem between the 2 controllers! 

Did you go through this doc thoroughly? 

2845.Technical_guide_TMS320F2806x.pdf

Regards,

Gautam

Hi Hamid,

The spi tx and rx registers on c2000 are 16 bit wide. U will have to do something like this. SpiTxData contains 8 bits of data that u want to send from c2000 to slave msp430

SpiaRegs.SPITXBUF=(((Uint16)SpiTxData)<<8);  //Spi register is 16 bit, Left LSByte Right MSByte, LSB is send first, SpiTxData is right justified.

Without the above u will send junk in case u intend to transmit 8 bits.

Check that mode on both processors are same e.g. data on rising edge, delayed clock phase etc.

If u have a scope connect one channel to STEA and 2nd to SPI CLK, see that STEA encloses all 8 spi clock pulses and there is sufficient delay between STEA going low and start of clock and STEA going high and clock ending. Repeat the same and check clock vs data. Send e.g. 0x81. Left side on scope screen corresponds to 8 and right side to 1. Confirm that the clock and data are correct.

Let me know once data is corrected. U will have to build a state machine on the slave and master for data exchange. Cmd->Data->Data etc. type.

Regards

Jawwad

Hi,

Thank you for your help.I do perform an eight bit left shift before transmission on the DSP side. I have verified the data getting out of the DSP to MSP430.

I have lowered the SPI clock frequency to 78KHZ and I receive the Command sent by DSP on the MSP430 side.I have verified the STEA vs. SPICLK and SPICLK vs. TXDATA on the MSP430, everything looks fine, it is only synchronization issue between these two micros.BIT5 on the MSP430 is used as the STEA control signal which I use to transmit the data to DSP on the right time (synchronize).I can read delay of approximately 100msec between each transmission from the  DSP side. On DSP side I use polling method to capture the response coming back from the MSP430. The interface works fine when I have no application code running on my MSP430(Empty while (1) loop) .I use an interrupt handler on the MSP430 to capture the incoming command from DSP Maser. When MSP430 receives proper command It  generates a response.If the main's while loop is empty, A response will be successfully sent to DSP, and I can see correct bytes in my buffer, but when there are some application like reading ADC and updating the transmission buffer, then I experience the bit shifting issue.Current interface works on and off not all the time.Below is the ISR I use on the MSP430 side for receive and transmission operation. The buffer used by send
_master_response() routine gets updated using values captured from ADC peripheral.This ISR sometimes hangs when I include"while (!(IFG2 & UCA0TXIFG));" or "while ((UCA0STAT &UCBUSY));" statement in it.Without these statements, the bytes gets transmitted but most of the time shifted right or left.

#pragma vector=USCIAB0RX_VECTOR
__interrupt void USCI0RX_ISR (void)
{
#if 1

while (!(IFG2 & UCA0RXIFG));              // USCI_A0 RX buffer ready?

rdata=UCA0RXBUF;
if ((rdata=='p')|| (Transmit_FLAG==1))
{
            Transmit_FLAG=1;
#if 1
            if (BIT5)
            {
            //while (!(IFG2 & UCA0TXIFG));
            send_master_response();
            //while ((UCA0STAT &UCBUSY));
            }
#endif
}
#endif
}

You mentioned, creating a state machine. Do you have a sample code, that I can try?

Thanks

Hi Hamid,

Its great that u have done all tests and have ruled out hardware,architecture and config problems.

Now I believe ur ADC Interrupt  and other competitive interrupts are taking too much of a time on MSP side. The simplest quickest solution is to prioritize spi interrupt on MSP side. This will ensure that if another low priority interrupt is in process and spi receive interrupt occurs, the interrupt being serviced relinquishes control to the higher priority interrupt i.e. spi.

See if u have too much of processing in ADC Interrupt or other ints. Think of reducing time there. Note that ur quantum of real time latency will be governed by the longest interrupt time.Try reducing that.

Let me know if need further discussion

Regards

Jawwad

Hi

I see a problem in your code as well. U should not use "while". It will definitely give problems. Use "if" instead so that the interrupt returns and does not block.

Use switch statements to built state machine.

State 0: //Receive command

State:1 //First response to command

State;2 //2nd response to command

and so on.

U will have to tweak delays so that u don't over run the receiver.

Regards

Jawwad