I have an application where I am using ePWM registers to control a duty cycle with comparators set as CBC trip zone events to act as current limits. The same ADC's that act as the comparators' input are being used to report current readings. Because of the way the circuit is designed, current feedback from these ADCs is only valid if current limit has not been activated (i.e. a CBC event has not occurred ). I do this using the following code which occurs at 10kHz:
if((EPwm1Regs.TZFLG.bit.CBC | EPwm2Regs.TZFLG.bit.CBC | EPwm3Regs.TZFLG.bit.CBC))
{
EPwm1Regs.TZCLR.all |= 0xFFFF;
EPwm2Regs.TZCLR.all |= 0xFFFF;
EPwm3Regs.TZCLR.all |= 0xFFFF;
}
else
{
current = ADC_VAL(current_index);
}
Theoretically, the current reading should be bypassed if one of the CBC flags has been latched and resume readings if the CBC flags have not been set for a whole period. However, writing to the TZCLR registers does not seem to be clearing the TZFLG bits. While executing the code, the current readings occur as expected. I can force a current limit event by commanding the duty cycle to a large value. The current readings stop as expected, but when I lower the duty cycle to exit current limit, the flags remain set. The ePWM modules resume normal operation, but the TZFLGs cannot be cleared despite writing to the TZCLR registers. Any ideas?
