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SPI interrupt not occuring in standard mode (=no fifo)

stevenh
Guru 20045 points

Hello,

Some Background info:

My application acquires data from three ADCs using the SPIA (in FIFO mode) and both of McBSP (using DMAs).  The SPIA is running the slowest, so the SPIA ISR sets up the DMA and McBSPB to transfer the ADC data to an external RAM chip.  The same SPIA ISR, sets up the SPIA and McBSPA (using no DMA) to output data to two serial DAC. I unit tested the whole process with all stated peripherals in loop back mode and the unit test passed.

Issue:

When performing timing studies on the serial DAC output part of the code, I realised that I had not changed the SPIA from FIFO mode to standard mode (no FIFO) .  After changing the SPIA to standard mode for the serial DAC output, the process does not call the SPIA ISR.  According to the registers shown below (as taken after several seconds of the code running), the processor should be calling the SPIA ISR.  

SPIST (BIT 6, SPI INT FLAG) = 1
SPIFFTX = 0xA080
SPICCR = 0x9F
SPICTL = 0x0F

PIEIER6 = 0x0002
IER = 0x0061

Is there anything else I can check?  What could be wrong?

Stephen

  • 0
    Guru 20045 points

    I have already solved this issue by leaving the SPI in FIFO mode and then setting the Transmit buffer full setting to zero.  However, I would still like to know why the standard mode doesn't work.

    Stephen

  • 0 in reply to stevenh
    Guru 20045 points

    My fix doesn't correct the issue.  I need to have a delay between sending data and FIFO mode won't allow that to happen.

    Stephen

  • 0
    Mastermind 7585 points

    Steven,

    I guess the mistake is to use the wrong interrupt line. In standard SPI - mode PIE Interrupt 6.1 (SPI-RX) is the only possibel interrupt, even when you do a SPI - transmit. Since the SPI shift is a closed loop, the Master will receive the same number of bits as it  has transmitted. Even when you have a SPI - DAC as slave the receiver part of the C2000 will read some dummy data. 

    The situation is different when you activate FIFO - modes.  Here you can specify a different interrupt level for RX-FIFO and TX-FIFO, hence you need two different PIE-Vectors (6.1 and 6.2).

    So just change the interrupt setup from 6.2. to 6.1 (Vecttable, PIEIER) and your non-FIFO code will work.

      

  • 0 in reply to Frank Bormann
    Guru 20045 points

    Thanks Frank.

    That works. 

    Stephen