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Noise generated by I2C bus

Other Parts Discussed in Thread: TMS320F28027

Hello,

I'm a little unclear as to where to post this exactly, but since we are using a C2000 in this application, I will post here. If anyone knows of a better place for me to ask this question, I would be happy to transfer to the proper forum.

We are designing a professional home audio system, and are using a TMS320F28027 to control an LCD display as well as send commands to a DSP on the main board. The commands to the DSP are being sent by I2C. What is happening is that the I2C is generating a LOT of noise whenever it communicates. We have managed to track it down with a scope. On every falling edge of the SCL or SDA lines, a very narrow negative spike is created. The magnitude of the spike is in the neighborhood of 1 volt or so. It's very narrow, 20 or 30 ns or so, but it is causing some rather significant noise in the analog ground bus as well, which is being produced as noise in the speakers which is very noticeable when the input signal is nil.

We are using 2.2k pull up resistors. We have tried adjusting the clock from 100khz to 400khz and even 1mhz, and this does not appear to make any difference. We have experimented with putting caps on the I2C line to filter and even diodes. Nothing appears to make much difference up to this point. The diodes do prevent the negative spike, but they also kill the signal and make it useless.

Has anyone dealt with this kind of issue before, so that they would have any suggestions?

Thank you in advance.

  • Changing the frequency alone wont affect much, try to use higher pull up values, like 10 K. Also take a look at your analog ground layout, maybe it is not good and explains the coupling of digital noise to it.

  • Thank you for the quick reply. The reason for using the 2.2k is that I have been running the bus at 1mhz. I realize that is officially beyond the typical 100k/400k spec, but we are communicating with an EEPROM and a DSP on the bus, and they don't seem to have any issue at all with the comm speeds. Also at 1mhz, I can see the leading edge of the pulses beginning to round a bit, so I think increasing the resistors would magnify that effect to unacceptable levels. Speed is not really critical, so we might look at lowering the data rate to 100k and raising the values of the resistors accordingly.

    As far as isolating the ground bus, yes, I agree that would probably be the best way. Unfortunately, in the rest of the circuitry we have DA converters which have the digital and analog grounds internally coupled. We think that is exacerbating the situation. I won't say who the manufacturer is, but I don't believe it's TI   ;)

  • Even if the grounds are connected at the DACs, you can try to minimize coupling in other areas of the board. The idea is to avoid that the return currents of digital lines go thru the analog ground, there are many presentations and application notes from TI that discuss technoques to achieve this.

  • Thank you. Do you have one or two that you might suggest in particular?

  • http://www.ti.com/lit/ds/snas040d/snas040d.pdf


    I cant find the source, but a common recommendation these days is to separate analog and digital, verify that signals from each domain dont go to the other domian, and once this is done, make all the plane a singlw one. Personally I prefer to keep small separations or cuts in the gnd plane where i think noide can couple

  • Thanks, I'll look it over in detail.

  • I found the thread, hope it will be helpful

    http://e2e.ti.com/support/data_converters/precision_data_converters/f/73/t/211461.aspx


    Best regards,

    Avi