TMS320f2808 SCI not working

Sung,

I believe the issue that you are seeing is explained by the description below:

The SCI expects the signal to be high between frames.  If this is not true than the C2000 device will first throw a FE framing error (because a stop bit '1' was not found) and then after 10 more bit durations a BRKDT breakdetect error will occur.

Once a BRKDT has occurred the SCI must be reset (via the SW RESET bit) in order for the SCI to receive data again.

Hopefully this helps explain what you are seeing.  If not, help me to better understand the problem.


Thank you,
Brett

Brett, 

The data is in 8bits ,1stop, no parity at 9600 and when i sniff the uart line the stop bit exist. 

The SCICCR =0x07;

I do not know why dsp cannot recognize the stop bit.

Sung,

When there is no any data transfer from transmitter to SCI RX, application hardware should keep the receiver line high.  Please check this.

Also, when you sniff the SCI RX line, please check whether the baud rate is as you expected (9600) or not.

Thanks and regards,
Vamsi  

Vamsi,

• well, if there is no data, the rx line is staying low.
• Yes, I am observing the data by using Serial Port Monitor pc software and 9600baud rate only allows data coming in.

Thanks

Here are the setting I did

EALLOW

    GpioCtrlRegs.GPAPUD.bit.GPIO11 = 0;    // Enable pull-up for GPIO11 (GPS_TX_DSP_RX)
    GpioCtrlRegs.GPAPUD.bit.GPIO9 = 0;       // Enable pull-up for GPIO9 (GPS_RX_DSP_TX)
    GpioCtrlRegs.GPAQSEL1.bit.GPIO11 = 3;  // Asynch input GPIO11 (GPS_TX_DSP_RX)
    GpioCtrlRegs.GPAMUX1.bit.GPIO11 = 2;   // Configure GPIO11 for GPS_TX_DSP_RX operation
    GpioCtrlRegs.GPAMUX1.bit.GPIO9 = 2;   // Configure GPIO9 for GPS_TX_DSP_RX operation

EDIS

    ScibRegs.SCICTL1.all = 0x03;        // Reset and RX/TX enable, no sleep
//    ScibRegs.SCICTL1.all = 0x23;        // Making sure that RX/TX are enabled
    ScibRegs.SCICCR.all = 0x07;            // 8 bit word, idle, no par, 1 stop bit
    ScibRegs.SCIHBAUD = 0x00;
    ScibRegs.SCILBAUD = 162;            // 13 for 115200 bauds, 162 for 9600
    ScibRegs.SCICTL2.all =0x03;            // Transmit/Receive ready interrupt enable
    ScibRegs.SCICTL2.bit.TXINTENA =1;
    ScibRegs.SCICTL2.bit.RXBKINTENA =1;
//    ScibRegs.SCIPRI.all = 0x08;            // Free run mode
    ScibRegs.SCICTL1.all = 0x23;        // Making sure that TX is enabled, exit reset mode    
    ScibRegs.SCIFFTX.all = 0xE0E0;        // Tx FIFO enabled, int
    ScibRegs.SCIFFRX.all = 0x204F;        // RX FIFO enabled
    ScibRegs.SCIFFCT.all = 0x0000;        // 1 baud clock cycles delay, no auto baud

 // Initialize the PLLCR to 0xA (100MHz)
   InitPll(0xA);//A

SysCtrlRegs.LOSPCP.all = 0x0004;        //12.5MHz

SysCtrlRegs.PCLKCR0.bit.SPIBENCLK = 1;   // SPI-B

Sung,

You are seeing framing errors because the transmitter is keeping the communication line low when data is not being transmitted.  This would cause C2000 SCI to think the low level as a start bit and then it would expect a stop bit after 8 baud bits and if the communication line is still low, C2000 SCI would treat it as a missing stop bit.

Thanks and regards,
Vamsi  

Vamsi,

That makes sense. does it mean hardware fix required? I do not put another inverter because it would change my data(current data are correct). Any suggestion?

Thank You