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ControlSUITE and F280x

Anton Kachalov
Intellectual 705 points
Other Parts Discussed in Thread: CONTROLSUITE

Good day.

ControlSUITE download page says that it supports TMS320F280x but it doesn't (reference link from F2808 software download section).

I really excited of new style API for peripherals and system for F2802x and have adopted this API for F280x and make it available on https://github.com/ya-mouse/f280x_driverlib.

I've found a mistake in v210/f2802x_common/source/sci.c in Register name that makes it unusable:

void SCI_setRxFifoIntLevel(SCI_Handle sciHandle, const SCI_FifoLevel_e fifoLevel)
{
    SCI_Obj *sci = (SCI_Obj *)sciHandle;


    // clear the value
    sci->SCIFFTX &= (~SCI_SCIFFRX_IL_BITS);

    // set the bits
    sci->SCIFFRX |= fifoLevel;

    return;
} // end of SCI_setRxFifoIntLevel() function

In a polling mode initialized as follows:

           CLK_enableSciaClock(myClk);

           /* 1 stop bit,  No loopback
            * No parity,8 char bits,
            * async mode, idle-line protocol */
           SCI_disableParity(mySci);
           SCI_setNumStopBits(mySci, SCI_NumStopBits_One);
           SCI_setCharLength(mySci, SCI_CharLength_8_Bits);

           /* enable TX, RX, internal SCICLK,
            * Disable RX ERR, SLEEP, TXWAKE    */
           SCI_enableTx(mySci);
           SCI_enableRx(mySci);
           SCI_enableTxInt(mySci);
           SCI_enableRxInt(mySci);

        /* SCI BRR = LSPCLK/(SCI BAUDx8) - 1 */
    /*    SciaRegs.SCIHBAUD = 0x00; */  /* (CPU_FRQ / (115200 * 32) - 1)     */
    /*    SciaRegs.SCILBAUD = 0x1b; */  /* 9600 baud == 0x144 @ 100MHz SYSCLOCKOUT; */
           SCI_setBaudRate(mySci, SCI_BaudRate_115_2_kBaud);

           SCI_enable(mySci);

           /* Setup SCI-A FIFO */
           SCI_enableFifoEnh(mySci);

           SCI_resetTxFifo(mySci);
           SCI_clearTxFifoInt(mySci);
           SCI_resetChannels(mySci);
           SCI_setTxFifoIntLevel(mySci, SCI_FifoLevel_1_Word);
           SCI_enableTxFifoInt(mySci);

           SCI_resetRxFifo(mySci);
           SCI_clearRxFifoInt(mySci);
           SCI_setRxFifoIntLevel(mySci, SCI_FifoLevel_1_Word);
           SCI_enableRxFifoInt(mySci);

I was unable to receive anything while SCI_isRxDataReady() checks for SCI_SCIRXST_RXRDY_BITS in SCIRXST register. I've changed this check to SCI_SCIFFRX_FIFO_ST_BITS in SCIFFRX register to get it works.

Also there is a mistype in sprs230n.pdf, page 46, table 3-15 in line:

Reserved 0x701F – 0x7020 1 Reserved

Column "size" should be equal to "2".