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Concerto M36 McBSP and ADS1274

mike fontes
Expert 1385 points

Other Parts Discussed in Thread: CONTROLSUITE, ADS1274

I am getting ready to hook up an ADS1274 to the C2000 McBSP port on the Concerto M36 part.  I noticed there wasn't much in the API world for the McBSP port as compared to some of the other SSI peripherals.  Has anyone set up the McBSP in SPI mode, using multi word frames?  Has anyone seen any code for controlling those ports at a level above HWREG()?  I am planning to use the TI/RTOS with this system. I haven't seen any info showing this peripheral considered in the Resource Explorer.  Is there anything new for the McBSP peripheral in the April version of ControlSUITE?

Sincerely,

Mike Fontes

  • 0
    Expert 1385 points

    I started with the DMA Internal Interrupt Loopback project and have been able to change the datasize to 24 bit values.  I am still working out the correct combination for how to get the 4 24bit words of data into the part the easiest.  Are there any examples showing larger than 16 bit data movement?

    I am also a little concerned about how I will seamlessly take the examples of individual peripherals and mesh them into the TI RTOS running on both processors.  Are there any examples coming up showing how to handle peripherals not shown when using the resource explorer?

    Sincerely,

    Mike Fontes

  • 0 in reply to mike fontes
    Expert 1385 points

    It has been four months since I posted the original question and I have yet to get a response. I have worked on many peripherals since this started but I am now to the point that I need to get the ADS1274 hooked up to my M36 processor.  I have gotten the MCBSP port running in loop back mode and I have been able to generate the clk signal I need to provide the master clock for the ADS1274 at 20.48Mhz to give me the 40K samples per second I want to collect from the 4 channels.  I have been able to get the ADS1274 to start data collection in SPI mode using the Ready signal.  I am clocking in the data from the ADS1274 at a few different frequencies during my testing.  The data I am receiving is not consistent at all at this point.  I think it is related to the fact that I can't figure out how to program the McBSP to only perform 96 reads to get the 4 channels of 24 bit data from the chip.  The McBSP does not stop the Data Clock on MCLKRA once the 4 channels of data are read in.

    I looked at using the SPI mode because it has clock stop mode, but it doesn't have a provision for the Ready interrupt like the MFSRA in the McBSP mode.

    Is there anyone ther I can discuss this problem with so I can zero in on a particular strategy and then implement it?

    Sincerely,

    Mike Fontes

  • 0 in reply to mike fontes
    TI__Mastermind 23235 points

    <including document for solution>

    McBSP.pdf