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2808 SPI FIFO mode code example

yosefa shmuel1
Prodigy 40 points

Is there a code reference or some description on how to use the SPI FIFO mode - how to access the FIFO on TX and RX side ? 

Is there an option to use the TX FIFO and change the FIFO length online - to use when having a protocol with different message lengths  ? 

Thanks 

Yosefa 

  • 0
    TI__Guru* 93800 points

    yosefa shmuel1 said:

    Is there a code reference or some description on how to use the SPI FIFO mode - how to access the FIFO on TX and RX side ?

    Yosefa,

    For 280x there are some examples in http://www.ti.com/tool/sprc191

    The spi_loopback_interrupts uses the FIFO and interrupts.

    Lori

  • 0 in reply to Lori Heustess
    Prodigy 40 points

    Thanks 

    I looked at the examples and did not see how can send more than one word (16 bits ) at the time - the port has 16 internal registers on both sides (TX and RX) , how do I access them? 

    and my second question was regarding the TX side - assuming I can send several words at the time , can this number change on line? 

    Thanks again

  • 0 in reply to yosefa shmuel1
    TI__Guru* 93800 points

    yosefa shmuel1 said:
    I looked at the examples and did not see how can send more than one word (16 bits ) at the time - the port has 16 internal registers on both sides (TX and RX) , how do I access them? 

    You load to and read from the FIFO using two SPI FIFO registers SPIFFTX, SPIFFRX.     There is no way to access the buffer registers within the FIFO - only the next one in and the next one out. 

    yosefa shmuel1 said:
    and my second question was regarding the TX side - assuming I can send several words at the time , can this number change on line?

    I don't understand the question.  The SPI will send / receive if it has data to do so even if you are writing a new value to the buffer. 

  • 0 in reply to Lori Heustess
    Prodigy 40 points

    Thanks

    I think I understand now how to handle the SPI FIFO on both sides (TX and RX)  

    (I am familiar with older TI DSP where there was a buffered serial port and the user could allocate the TX \ RX buffer - this is not the case here)