Does the SCICTL2 bit TXRDY reset it self ? I'm writing to the SCITXBUF when the TXRDY bit is high, but after two writes (the first time the TXEMPTY goes low as expected) the TXRDY goes low and remains low. I'm stepping through the code in CCSv5 and I'm not sure what I'm seeing. After two writes I can't step into or over my while infinite loop which waits on TXRDY to be high again. I have to resume and pause shortly after and notice new data was written to the SCITXBUF, but I still don't see TXRDY or TXEMPTY go high ever again. Here is my SCI initialization function.
void scia_init()
{
// Note: Clocks were turned on to the SCIA peripheral
// in the InitSysCtrl() function
SciaRegs.SCICCR.all = 0x0007; // 1 stop bit, No loopback
// No parity, 8 char bits,
// async mode, idle-line protocol
SciaRegs.SCICTL1.all = 0x0003; // enable TX, RX, internal SCICLK,
// Disable RX ERR, SLEEP, TXWAKE
SciaRegs.SCICTL2.bit.TXINTENA = 0;
SciaRegs.SCICTL2.bit.RXBKINTENA = 0;
SciaRegs.SCIHBAUD = 0x0000; // 9600 baud @LSPCLK = 15MHz (60 MHz SYSCLK).
SciaRegs.SCILBAUD = 0x00C2;
SciaRegs.SCICTL1.all = 0x0023; // Relinquish SCI from Reset
}
- Mario