Concerto F28M35H52 will not boot from serial port

Additional information:

The clock output amplitude of the of the ASEMP is +3.68v to -0.32v, which is right on operating limits.

nXRS and nARS are tied together and pulled up via 2.2k to 3.3V

Nigel,

1) An external pull-down resistor in required.  This is documented in the datasheet.  Internally, we always use a 2.2Kohm resistor to pull-down the signal.
2) Per the datasheet, these pull-ups are required.  I would recommend following the datasheet.  However, as long as TRSTn isn't pulsed (ie an emulator tries to connect to the device or signal noise causes TRSTn to inadvertently go high) the value on EMU0 or EMU1 shouldn't technically matter.
3) The documentation is correct.  Tying the two grounds together may result in additional noise.  The issue in the controlCARD is documented in the controlCARD errata found in the Infosheet in the following controlSUITE directory:
\controlSUITE\development_kits\~controlCARDs\CCF28M35xxHWdevPkg_v2\

You seem to have the boot mode set correctly and have connected your UART to the proper GPIO pins. 

Hopefully this helps.


Thank you,
Brett

Brett,

Thanks for the info.

The problem appears to be the clock oscillator. Do you know what the input impedance of pin 93 is?

Thanks

Nigel

Nigel,

We don't typically spec this measurement.  I don't think it should be a concern though.  If it is, I think we may be able to find some type of estimate (I won't guarantee this though).

Are you further now or still stuck on the clocking?  If so, can you confirm that the oscillator is providing a valid 20MHz output.


Thank you,
Brett

Brett,

Still stuck. On power on it takes ~58mA and stays there, it looks like it never gets to the GPIO check for boot mode.

Confirmed that the clock was 20MHz, its from an oscillator not a crystal and it turns on 5ms after power is applied. Also someone at the oscillator company suggested that we input the cllock on X2 instead of X1. Is that an option?

For boot from serial the PPL is disabled, correct? If so is the clock rise and fall time required to be 2ns as in table 5.5?

Nigel

Nigel,

could you scope XRSn and see if the device is out of reset or going back to reset? it is preferable to bring the device out of reset only afte rthe external clock oscillator is stable.

is the M35x REV0 or REVA device?

Best Regards

Santosh

Santosh,

It is coming out of reset, but before the external clock is up. And it's a revA device.

Paul

Santosh,

Making some progress. Board now comes up and answers ping on UART0 and appears to negotiate the baud rate, but stops after that. The programmer I'm using is CodeSkin Chip Programmer (we have had this working with the dev board). Will try with LM Flash programmer.

Nigel

Nigel,

make sure you are linking the application to valid loadable address range, which starts from 0x20005000. Preferably your entry point (referred to as RESET_ISR in TI examples) is linked to 0x20005000. your application that you want to load should have everything linked to beyond this address.

Best Regards

Santosh

Santosh,

You were right about the XRS line, holding that low until the clock was up worked. We have successfully loaded both cores using CodeSkin. 

We do have an issue trying to load a particular software file into the M3, we get a write error: 509 @20d328.

Thanks for your help.

Nigel

Nigel,

thanks for the update. The address 0x20d328 looks like flash address? the ROM loaders only support loading of code into RAM.

you can use uniFlash with serial loader to allow for flash programming of application via UART port using serial ROM loader. The uniFlash SW loads a small kernel onto the device RAM using UART ROM loader and starts kernel. The Kernel will then take over the UART port and gets the application binary and programs the flash. You should be able to load code onto both M3 and C28x with this proceedure.

Best Regards

santosh