It is possible to allow C28x can use the shared ram before M3 start running?

juan jimenez

Hi everyone,

I have a F28M35H52C1 control card. I want to place some parts of my C28x code in the shared RAM because it doesn't fit into the C28x RAM. So, I modified my .cmd file to adapt it to this scenario. The problem is that I need to run the application on the M3 side before even loading my c28x application in order to give c28x access to shared RAM. Is there any way that c28x get access to the shared RAM without running the M3 application.

Sincerely, Juan.

over 12 years ago

0 Vivek Singh over 12 years ago

TI__Guru** 115191 points

Hi Juan,

If you want to load the C28x code into shared RAM using CCS, you don't have to run the M3 application to give C28x access to shared RAMs. Loading of C28x code into shared RAM using CCS is allowed even though C28x doesn't have access to shared RAM. But to run C28x code from shared RAM or to WRITE into shared RAM using C28x application, you have to enable C28x access to shared RAM from M3 application.

Just for info, do you see any issue with running the M3 application code before loading the C28x code?

Regards,

Vivek Singh

0 juan jimenez over 12 years ago in reply to Vivek Singh

Intellectual 670 points

Hi Vivek, thanks for your reply.

I know it is necessary to run the M3 application before running the c28x side. However, I noticed if I load the C28x code before running the M3 application, then the c28x application start running immediately instead of remaining in suspended status. It's not a normal behavior.

I get the same message from the debug perspective:

Texas Instruments XDS100v2 USB Emulator_0/C28xx_0 (running)

Then, If I pause the application, the debugger indicates that no symbols are defined and shows the following info:

0xFEF73 (no symbols are defined for 0x3FEF73)

Obviously, the application is not running well. I guess the application hasn't been loaded properly because the M3 side didn't enable the access to Shared Ram. I say that because c28x application works well when I load the application after running the M3 side.

Regards, Juan.

0 Vivek Singh over 12 years ago in reply to juan jimenez

TI__Guru** 115191 points

Hi Juan,

It depends on CCS setting. By default after code load, CCS will try to run the application to main and if in this process there is any access to shared RAM then it'll not work. You can change the CCS setting so that application does not runs to main after code load.

On CCS5, you can change the CCS setting for the same using following step.

Click on "Tool" -> "Debugger Option" -> "Generic Debugger Option"

This will open new console where you can find a section "Auto Run Option". In this, uncheck the setting for "On a program load or restart".

Let me know if this helps.

Regards,

Vivek Singh

0 juan jimenez over 12 years ago in reply to Vivek Singh

Intellectual 670 points

Great, Vivek!

It worked perfectly. Thank you a lot.

Regards, Juan.

0 Sheldon he over 9 years ago

Intellectual 420 points

HI Juan

I am doing the same work like you, and I am glad to see you have solved your problem.

Could you share your method to give ram access to C28 core? I am using lib func.

But I didn't see it works. C28 just stuck into running and never reach to main.

And my m3 code is attached below, could you give me some advice?

Best regards

hhelib

Setup_M3_Core.zip

0 Sheldon he over 9 years ago in reply to Vivek Singh

Intellectual 420 points

HI Vivek

I have seen a lot of post of you about the use of shared RAM for c28 to load program and data.

I use lib function RAMMReqSharedMemAccess to do the work. But whatever I do I get the message from the debug perspective:

Texas Instruments XDS100v3 USB Emulator_0/C28xx_0 (running)

Then, If I pause the application, the debugger indicates that no symbols are defined and shows the following info:

0x3FEFA6 (no symbols are defined for 0x3FEFA6 )

I think there is something wrong with my M3 program, could you give me advice?

3730.Setup_M3_Core.zip

Best regards

hhelib

0 Vivek Singh over 9 years ago in reply to Sheldon he

TI__Guru** 115191 points

Hi,

I looked at your M3 code. I see that you are issuing BOOT CMD to C28x and then changing the master ownership of shared RAM. This could cause a problem if C28x start accessing a shared RAM before it gets the ownership of that RAM. Instead you should change that code like below -

RAMMReqSharedMemAccess((S0_ACCESS|S1_ACCESS|S2_ACCESS|S3_ACCESS|S4_ACCESS|S5_ACCESS|S6_ACCESS|S7_ACCESS),SX_C28MASTER);
for (i=0;i<20;i++){};

IPCMtoCBootControlSystem(CBROM_MTOC_BOOTMODE_BOOT_FROM_FLASH);

See if this fixes the issue. If not then please let me know for what purpose C28x is using the shared RAM in this case? And did you try using some local RAMs instead of shared RAM to check if that solves the issue (to confirm usage of shared RAM is the issue)

Regards,

Vivek Singh

0 Sheldon he over 9 years ago in reply to Vivek Singh

Intellectual 420 points

HI Vivek
As you mentioned, It works properly now. Thanks for your great help!
Regards,
hhelib

0 Sheldon he over 9 years ago in reply to Vivek Singh

Intellectual 420 points

Hi Vivek,

I have additional one question about the shared RAM in concerto device. I want to store the code in C28 FLASH and after run bootloader on

c28 side, I hope all the things can be copied into shared RAM for quick executing. So I modified some CMD file as I wish (actually I don't know

weather it is wrong or right). The CMD file can not work till now. Could you give me some advice? (The compile process is ok)

MEMORY
{
PAGE 0:    /* Program Memory */

    FLASH       : origin = 0x100000, length = 0x3FF80
    BEGIN       : origin = 0x13FFF0, length = 0x4
    S07SHRAM    : origin = 0xC000,   length = 0x10000
    M01SARAM    : origin = 0x0,      length = 0x800     /* on-chip RAM block M0, M1 */
PAGE 1 :   /* Data Memory */
   

    PIEVECT     : origin = 0xD00,    length = 0x100
    L03SARAM    : origin = 0x8000,   length = 0x4000    /* on-chip RAM block L0-L3 */
    CTOMMSGRAM  : origin = 0x3F800,  length = 0x400
    MTOCMSGRAM  : origin = 0x3FC00,  length = 0x400
}

SECTIONS
{
    /* Allocate program areas: */
     codestart  : > BEGIN,          PAGE = 0
    .cinit      : LOAD = FLASH      PAGE = 0,
                  RUN  = S07SHRAM   PAGE = 0,
                  LOAD_START(_cinitLoadStart),
                  LOAD_SIZE(_cinitLoadSize),
                  LOAD_END(_cinitLoadEnd),
                  RUN_START(_cinitRunStart)
                  RUN_SIZE(_cinitRunSize),
                  RUN_END(_cinitRunEnd)
    .pinit      : LOAD = FLASH      PAGE = 0,
                  RUN  = S07SHRAM   PAGE = 0,
                  LOAD_START(_pinitLoadStart),
                  LOAD_SIZE(_pinitLoadSize),
                  LOAD_END(_pinitLoadEnd),
                  RUN_START(_pinitRunStart)
                  RUN_SIZE(_pinitRunSize),
                  RUN_END(_pinitRunEnd)
    .binit      : LOAD = FLASH      PAGE = 0,
                  RUN  = S07SHRAM   PAGE = 0,
                  LOAD_START(_binitLoadStart),
                  LOAD_SIZE(_binitLoadSize),
                  LOAD_END(_binitLoadEnd),
                  RUN_START(_binitRunStart)
                  RUN_SIZE(_binitRunSize),
                  RUN_END(_binitRunEnd)
    .text       : LOAD = FLASH      PAGE = 0,
                  RUN  = S07SHRAM   PAGE = 0,
                  LOAD_START(_textLoadStart),
                  LOAD_SIZE(_textLoadSize),
                  LOAD_END(_textsLoadEnd),
                  RUN_START(_textRunStart)
                  RUN_SIZE(_textRunSize),
                  RUN_END(_textRunEnd)

    /* Initalized sections go in Flash */
    .econst     : LOAD = FLASH      PAGE = 0,
                  RUN  = S07SHRAM   PAGE = 0,
                  LOAD_START(_econstLoadStart),
                  LOAD_SIZE(_econstLoadSize),
                  LOAD_END(_econstLoadEnd),
                  RUN_START(_econstRunStart)
                  RUN_SIZE(_econstRunSize),
                  RUN_END(_econstRunEnd)
    .switch     : LOAD = FLASH      PAGE = 0,
                  RUN  = S07SHRAM   PAGE = 0,
                  LOAD_START(_switchLoadStart),
                  LOAD_SIZE(_switchLoadSize),
                  LOAD_END(_switchLoadEnd),
                  RUN_START(_switchRunStart)
                  RUN_SIZE(_switchRunSize),
                  RUN_END(_switchRunEnd)
    .args       : LOAD = FLASH      PAGE = 0,
                  RUN  = S07SHRAM   PAGE = 0,
                  LOAD_START(_argsLoadStart),
                  LOAD_SIZE(_argsLoadSize),
                  LOAD_END(_argsLoadEnd),
                  RUN_START(_argsRunStart)
                  RUN_SIZE(_argsRunSize),
                  RUN_END(_argsRunEnd)
    /* Allocate uninitalized data sections: */
    .stack      : > L03SARAM PAGE = 1
    .ebss       : > L03SARAM PAGE = 1
    .esysmem    : > L03SARAM PAGE = 1
    .cio        : > L03SARAM PAGE = 1
}

Best regards,

hhelib

FLASH TO RAM.zip

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It is possible to allow C28x can use the shared ram before M3 start running?