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Other Parts Discussed in Thread: TMS320F28069
Hi all,
I'm using the TMS320f28069 DSP, and I have realized a control board with this chip.
I have realized a firmware and it works very well.
My board works now only after run debug -mode with Jtag emulator connected (XDS100v2 USB emulator).
How can I start my board without debug/emulator?
TRST pin is connected to ground by a 2,2 k ohm resistor.
Thanks a lot.
You need to link your code to flash. Have you done this? Also, setup the jump-to-flash bootmode target instruction in CodeStartBranch.asm to be located at the jump-to-flash target address.
See appnote SPRA958 for assistance.
Regards
David
Dear DAVID,
I have studied the SPRA958L, I did not understand what you said.
What means "link your code to flash"?
In my file CodeStartBranch.asm I didn't found jump to flash target address.
In the pag 42 of the SPRA958L is written: "Check the Scripts menu in CCS v5 for boot mode selection
options", but my CCS is v.4 and there isn't the boot mode selection options in script menu.
I am very confused and I've got a lot of doubts, thanks a lot. BYE
My file is the follow:
TI File $Revision: /main/2 $
;// Checkin $Date: January 4, 2011 10:10:05 $
;//###########################################################################
;//
;// FILE: F2806x_CodeStartBranch.asm
;//
;// TITLE: Branch for redirecting code execution after boot.
;//
;// For these examples, code_start is the first code that is executed after
;// exiting the boot ROM code.
;//
;// The codestart section in the linker cmd file is used to physically place
;// this code at the correct memory location. This section should be placed
;// at the location the BOOT ROM will re-direct the code to. For example,
;// for boot to FLASH this code will be located at 0x3f7ff6.
;//
;// In addition, the example F2806x projects are setup such that the codegen
;// entry point is also set to the code_start label. This is done by linker
;// option -e in the project build options. When the debugger loads the code,
;// it will automatically set the PC to the "entry point" address indicated by
;// the -e linker option. In this case the debugger is simply assigning the PC,
;// it is not the same as a full reset of the device.
;//
;// The compiler may warn that the entry point for the project is other then
;// _c_init00. _c_init00 is the C environment setup and is run before
;// main() is entered. The code_start code will re-direct the execution
;// to _c_init00 and thus there is no worry and this warning can be ignored.
;//
;//###########################################################################
;// $TI Release: 2806x C/C++ Header Files and Peripheral Examples V1.00 $
;// $Release Date: January 11, 2011 $
;//###########################################################################
***********************************************************************
WD_DISABLE .set 1 ;set to 1 to disable WD, else set to 0
.ref _c_int00
.global code_start
***********************************************************************
* Function: codestart section
*
* Description: Branch to code starting point
***********************************************************************
.sect "codestart"
code_start:
.if WD_DISABLE == 1
LB wd_disable ;Branch to watchdog disable code
.else
LB _c_int00 ;Branch to start of boot.asm in RTS library
.endif
;end codestart section
***********************************************************************
* Function: wd_disable
*
* Description: Disables the watchdog timer
***********************************************************************
.if WD_DISABLE == 1
.text
wd_disable:
SETC OBJMODE ;Set OBJMODE for 28x object code
EALLOW ;Enable EALLOW protected register access
MOVZ DP, #7029h>>6 ;Set data page for WDCR register
MOV @7029h, #0068h ;Set WDDIS bit in WDCR to disable WD
EDIS ;Disable EALLOW protected register access
LB _c_int00 ;Branch to start of boot.asm in RTS library
.endif
;end wd_disable
.end
;//===========================================================================
;// End of file.
;//===========================================================================
Michele,
The F28069 should default to jump-to-flash if the debugger is NOT connected, unless you are pulling GPIO37 or GPIO34 low on your board for some reason (see Table 2-6 of the datasheet SPRS698C).
Now you need to link your code to flash. To do this, you modify the linker .cmd file (not CodeStartBranch.asm). All initialized section need to be linked to flash memory:
.text : > FLASH_ABCDEFGH, PAGE = 0
.cinit : > FLASH_ABCDEFGH, PAGE = 0
.const : > FLASH_ABCDEFGH, PAGE = 0
.econst : > FLASH_ABCDEFGH, PAGE = 0
.pinit : > FLASH_ABCDEFGH, PAGE = 0
.reset : > RESET, PAGE = 0, TYPE = DSECT /* We are not using the .reset section */
.switch : > FLASH_ABCDEFGH, PAGE = 0
The section 'codestart' should be linked to the BEGIN_FLASH memory:
codestart : > BEGIN_FLASH, PAGE = 0
You do not make any changes to file CodeStartBranch.asm.
Use the file F28069_nonBIOS_flash.cmd from SPRA958L as your model.
Regards,
David
Dear David,
I have done what you said. The GPIO37 and GPIO34 is float because in the SPRA958L is written that there are internal pull up.
The TRST pin in connected to ground by a 2,2k resistor.
I have linked the code with F28069_nonBIOS_flash.cmd, but to put the code into flash I'm using the "debug lunch" button. Is it correct?
This is my condition:
With emulator connected the DSP run,
I stop the debug and the DSP stop,
I disconnect the Jtag programmer and the DSP run.
But when I turn OFF and turn ON the board, the DSP not run
Thanks for your kindness and patience but this project is very important for me.
Regards
Michele,
Michele Fiorino said:I have linked the code with F28069_nonBIOS_flash.cmd, but to put the code into flash I'm using the "debug lunch" button. Is it correct?
The CCS "Debug Launch" button is flashing your program into flash. That is correct.
If the code works with the debugger connected, but won't work standalone, there are only a limited number of things that could be wrong.
1) Bootmode is not set correctly
2) CodeStartBranch is not linked correctly
3) Code is not properly configured to run from flash. All initialized sections shown in the .map file must be linked to flash.
4) Watchdog is resetting the device (the debugger could be turning the WD off, but standalone the WD is left running).
5) Other -- there are others I suppose. The above are the major one I can think of.
Michele Fiorino said:The GPIO37 and GPIO34 is float because in the SPRA958L is written that there are internal pull up.
For final product, it is better practice to use external pullups. The internal pullups are weak, so in a noise environment you don't want to rely on them. I doubt this is what's wrong in your case. Just stating best practices.
Michele, try running the F28069_nonBIOS_flash project that is in SPRA958L. Note that it outputs signals on GPIO32, GPIO34, and GPIO0/PWM1A, so make sure this will not cause contention problems on your board. You can modify the code to disable one or more of these outputs if you need to, but you want to leave one of them as an output so that you can tell if the code is running (connect to a scope and watch the pin toggle). If this code runs, then the problem is with your code. If this code doesn't run, then the problem is the bootmode settings on your board.
- David
Dear David,
you have a good idea!!!
If I open 28069_nonBIOS_flash project that is in SPRA958L the following message appear.
So I cannot run this example.
What can I do?
The error message also suggests you are opening the BIOS project, not the nonBIOS project. Make sure you open the correct one.
- David
Sorry David, I'm tired,
the message is the same with no bios project.
The correct image is the follow
My CCS version is: 4.2.4.00033
Thanks a lot
Michele,
CCS projects are not backwards compatible, meaning they cannot be opened with an earlier version of CCS than the one they were created with. You are lucky, as I have the code from an older version of the appnote that was written for CCSv4.2.3. This should work on your CCS v4.2.4. It is attached to this post.
- David
David, You're right.
My CCS opens your zip folder, but my Code Generation tools is older, the message that appear is the follow:
"This project was created using a version of Code Generation tools that is not currently installed: 6.0.1 [C2000]. Please install the Code Generation tools of this version, or migrate the project to one of the supported versions. F28069_example_nonBIOS_flash properties 1369151215083 5049"
If I try to update Code generation tool for c2000 the manage updater doesn't find a version more than 5.2.15
In this week I'm not feel very lucky as you said :-).
Usually you can just change the compiler versions desired in the project options. I'm not sure about CCSv4 as I haven't used that in a long time.
You said you were using XDS100 emulator. You should think about upgrading to CCSv5. You can get a free license for XDS100 emulators, so cost should not be an issue. You can download CCSv5 from the TI web. CCSv4 is old, and frankly was rather buggy or just didn't work smoothly. CCSv5 works a lot better.
- David
Dear David, your indications are very precious.
Today our DSP is booting from flash.
Now there is a little problem:
the SPLL and the sgen3D work very good in debug mode, but don't work in flash mode.
All the other part of code (PWM, ADC, SPI interface, CAn interface, ECAP etc.) work correctly.
Why?
Best reguards
Michele,
I'm not sure what you are referring to when you say SPLL and sgen3D. These must be your own software routines. My guess is you've got something linked to RAM that should be linked to flash.
Check the .map file produced by the linker. The only thing you should have linked to RAM are sections notated as "UNINITIALIZED". For example, you'll see stuff like this:
.ebss 1 00000002 00000042 UNINITIALIZED
00000002 00000036 Main_nonBIOS.obj (.ebss)
00000038 00000004 DefaultIsr_nonBIOS.obj (.ebss)
0000003c 00000004 rts2800_fpu32.lib : _lock.obj (.ebss)
00000040 00000004 : exit.obj (.ebss)
If you see any initialized sections that are linked to load to RAM, there is a problem.
- David
Yes David, SPLL and Sgen are Texas' routines from Solar Library.
I have founded 2 file.map in my froject folder.
The first is in a F2806x_FLASH folder, and the second is in a F2806x_RAM folder.
I 'm including in this message these files, because I don't understand if a routine is linked in RAM or in FLASH.
How can I change this link configuration (RAM vs FLASH)?
Thanks bye
******************************************************************************
TMS320C2000 Linker PC v5.2.15
******************************************************************************
>> Linked Wed May 22 15:36:48 2013
OUTPUT FILE NAME: <AsymmetricPWM.out>
ENTRY POINT SYMBOL: "_c_int00" address: 003f4f0c
MEMORY CONFIGURATION
name origin length used unused attr fill
---------------------- -------- --------- -------- -------- ---- --------
PAGE 0:
BOOT_RSVD 00000000 00000050 00000000 00000050 RWIX
progRAM 00008000 00000c00 00000120 00000ae0 RWIX
OTP 003d7800 00000400 00000000 00000400 RWIX
FLASHH 003d8000 00004000 00000000 00004000 RWIX
FLASHG 003dc000 00004000 00000000 00004000 RWIX
FLASHF 003e0000 00004000 00000000 00004000 RWIX
FLASHE 003e4000 00004000 00000000 00004000 RWIX
FLASHD 003e8000 00004000 00000000 00004000 RWIX
FLASHC 003ec000 00004000 00000000 00004000 RWIX
FLASHA 003f4000 00003f80 0000131d 00002c63 RWIX
CSM_RSVD 003f7f80 00000076 00000000 00000076 RWIX
BEGIN 003f7ff6 00000002 00000002 00000000 RWIX
CSM_PWL 003f7ff8 00000008 00000000 00000008 RWIX
FPUTABLES 003fd860 000006a0 00000000 000006a0 RWIX
IQTABLES 003fdf00 00000b50 00000b50 00000000 RWIX
IQTABLES2 003fea50 0000008c 00000000 0000008c RWIX
IQTABLES3 003feadc 000000aa 00000000 000000aa RWIX
BOOTROM 003ff3b0 00000c10 00000000 00000c10 RWIX
RESET 003fffc0 00000002 00000000 00000002 RWIX
VECTORS 003fffc2 0000003e 00000000 0000003e RWIX
PAGE 1:
RAMM0 00000050 000003b0 00000380 00000030 RWIX
RAMM1 00000400 00000400 00000000 00000400 RWIX
DEV_EMU 00000880 00000105 00000004 00000101 RWIX
SYS_PWR_CTL 00000985 00000003 00000003 00000000 RWIX
FLASH_REGS 00000a80 00000060 00000008 00000058 RWIX
CSM 00000ae0 00000020 00000010 00000010 RWIX
ADC_RESULT 00000b00 00000020 00000010 00000010 RWIX
CPU_TIMER0 00000c00 00000008 00000008 00000000 RWIX
CPU_TIMER1 00000c08 00000008 00000008 00000000 RWIX
CPU_TIMER2 00000c10 00000008 00000008 00000000 RWIX
PIE_CTRL 00000ce0 00000020 0000001a 00000006 RWIX
PIE_VECT 00000d00 00000100 00000100 00000000 RWIX
DMA 00001000 00000200 000000e0 00000120 RWIX
CLA1 00001400 00000080 00000040 00000040 RWIX
McBSPA 00005000 00000040 00000024 0000001c RWIX
ECANA 00006000 00000040 00000034 0000000c RWIX
ECANA_LAM 00006040 00000040 00000040 00000000 RWIX
ECANA_MOTS 00006080 00000040 00000040 00000000 RWIX
ECANA_MOTO 000060c0 00000040 00000040 00000000 RWIX
ECANA_MBOX 00006100 00000100 00000100 00000000 RWIX
COMP1 00006400 00000020 00000007 00000019 RWIX
COMP2 00006420 00000020 00000007 00000019 RWIX
COMP3 00006440 00000020 00000007 00000019 RWIX
EPWM1 00006800 00000040 00000040 00000000 RWIX
EPWM2 00006840 00000040 00000040 00000000 RWIX
EPWM3 00006880 00000040 00000040 00000000 RWIX
EPWM4 000068c0 00000040 00000040 00000000 RWIX
EPWM5 00006900 00000040 00000040 00000000 RWIX
EPWM6 00006940 00000040 00000040 00000000 RWIX
EPWM7 00006980 00000040 00000040 00000000 RWIX
EPWM8 000069c0 00000040 00000040 00000000 RWIX
ECAP1 00006a00 00000020 00000020 00000000 RWIX
ECAP2 00006a20 00000020 00000020 00000000 RWIX
ECAP3 00006a40 00000020 00000020 00000000 RWIX
EQEP1 00006b00 00000040 00000022 0000001e RWIX
EQEP2 00006b40 00000040 00000022 0000001e RWIX
GPIOCTRL 00006f80 00000040 00000040 00000000 RWIX
GPIODAT 00006fc0 00000020 00000020 00000000 RWIX
GPIOINT 00006fe0 00000020 00000020 00000000 RWIX
SYSTEM 00007010 00000030 00000030 00000000 RWIX
SPIA 00007040 00000010 00000010 00000000 RWIX
SCIA 00007050 00000010 00000010 00000000 RWIX
NMIINTRUPT 00007060 00000010 00000010 00000000 RWIX
XINTRUPT 00007070 00000010 00000010 00000000 RWIX
ADC 00007100 00000080 00000050 00000030 RWIX
SPIB 00007740 00000010 00000010 00000000 RWIX
SCIB 00007750 00000010 00000010 00000000 RWIX
I2CA 00007900 00000040 00000022 0000001e RWIX
dataRAM 00008c00 00001400 00000324 000010dc RWIX
RAML4 0000a000 00002000 00000000 00002000 RWIX
RAML5 0000c000 00002000 00000000 00002000 RWIX
RAML6 0000e000 00002000 00000000 00002000 RWIX
RAML7 00010000 00002000 00000000 00002000 RWIX
RAML8 00012000 00002000 00000000 00002000 RWIX
PARTID 003d7e80 00000001 00000001 00000000 RWIX
FLASHB 003f4000 00002000 00000000 00002000 RWIX
CSM_PWL 003f7ff8 00000008 00000008 00000000 RWIX
SECTION ALLOCATION MAP
output attributes/
section page origin length input sections
-------- ---- ---------- ---------- ----------------
.pinit 0 003f4000 00000000 UNINITIALIZED
SINTBL 0 0000801f 00000101
0000801f 00000101 SINTB360.obj (SINTBL)
.text 0 003f4000 00001121
003f4000 000009c5 REIPERSEI-Main.obj (.text)
003f49c5 000001d0 REIPERSEI-DevInit_F2806x.obj (.text)
003f4b95 000001b3 F2806x_DefaultIsr.obj (.text)
003f4d48 00000083 rts2800_ml.lib : fd_mpy.obj (.text)
003f4dcb 0000007a ECAN_Init.obj (.text)
003f4e45 0000006d F2806x_CpuTimers.obj (.text)
003f4eb2 0000005a rts2800_ml.lib : fs_mpy.obj (.text)
003f4f0c 00000044 : boot.obj (.text)
003f4f50 00000040 sgt3dc.obj (.text)
003f4f90 0000002a rts2800_ml.lib : l_div.obj (.text)
003f4fba 00000029 : fs_tol.obj (.text)
003f4fe3 00000028 F2806x_PieCtrl.obj (.text)
003f500b 00000027 CRC16.obj (.text)
003f5032 00000022 rts2800_ml.lib : i_div.obj (.text)
003f5054 0000001f : fd_tol.obj (.text)
003f5073 0000001d : i_tofd.obj (.text)
003f5090 0000001c : fs_tofd.obj (.text)
003f50ac 0000001b : args_main.obj (.text)
003f50c7 0000001a : i_tofs.obj (.text)
003f50e1 00000019 : exit.obj (.text)
003f50fa 00000016 : ul_tofd.obj (.text)
003f5110 00000009 : _lock.obj (.text)
003f5119 00000008 F2806x_CodeStartBranch.obj (.text)
.cinit 0 003f5121 00000101
003f5121 000000eb REIPERSEI-Main.obj (.cinit)
003f520c 0000000a rts2800_ml.lib : _lock.obj (.cinit)
003f5216 0000000a : exit.obj (.cinit)
003f5220 00000002 --HOLE-- [fill = 0]
IQmath 0 003f5222 000000d0
003f5222 00000047 IQmath.lib : IQ16div.obj (IQmath)
003f5269 00000047 : IQ3div.obj (IQmath)
003f52b0 00000042 : IQ3sqrt.obj (IQmath)
ramfuncs 0 003f52f2 0000001f RUN ADDR = 00008000
003f52f2 0000001b REIPERSEI-DevInit_F2806x.obj (ramfuncs)
003f530d 00000004 F2806x_usDelay.obj (ramfuncs)
.econst 0 003f5312 0000000c
003f5312 0000000c REIPERSEI-Main.obj (.econst)
codestart
* 0 003f7ff6 00000002
003f7ff6 00000002 F2806x_CodeStartBranch.obj (codestart)
IQmathTables
* 0 003fdf00 00000b50 NOLOAD SECTION
003fdf00 00000b50 IQmath.lib : IQmathTables.obj (IQmathTables)
.reset 0 003fffc0 00000002 DSECT
003fffc0 00000002 rts2800_ml.lib : boot.obj (.reset)
vectors 0 003fffc2 00000000 DSECT
.stack 1 00000050 00000380 UNINITIALIZED
00000050 00000380 --HOLE--
DevEmuRegsFile
* 1 00000880 00000004 UNINITIALIZED
00000880 00000004 F2806x_GlobalVariableDefs.obj (DevEmuRegsFile)
SysPwrCtrlRegsFile
* 1 00000985 00000003 UNINITIALIZED
00000985 00000003 F2806x_GlobalVariableDefs.obj (SysPwrCtrlRegsFile)
FlashRegsFile
* 1 00000a80 00000008 UNINITIALIZED
00000a80 00000008 F2806x_GlobalVariableDefs.obj (FlashRegsFile)
CsmRegsFile
* 1 00000ae0 00000010 UNINITIALIZED
00000ae0 00000010 F2806x_GlobalVariableDefs.obj (CsmRegsFile)
AdcResultFile
* 1 00000b00 00000010 UNINITIALIZED
00000b00 00000010 F2806x_GlobalVariableDefs.obj (AdcResultFile)
CpuTimer0RegsFile
* 1 00000c00 00000008 UNINITIALIZED
00000c00 00000008 F2806x_GlobalVariableDefs.obj (CpuTimer0RegsFile)
CpuTimer1RegsFile
* 1 00000c08 00000008 UNINITIALIZED
00000c08 00000008 F2806x_GlobalVariableDefs.obj (CpuTimer1RegsFile)
CpuTimer2RegsFile
* 1 00000c10 00000008 UNINITIALIZED
00000c10 00000008 F2806x_GlobalVariableDefs.obj (CpuTimer2RegsFile)
PieCtrlRegsFile
* 1 00000ce0 0000001a UNINITIALIZED
00000ce0 0000001a F2806x_GlobalVariableDefs.obj (PieCtrlRegsFile)
PieVectTableFile
* 1 00000d00 00000100 UNINITIALIZED
00000d00 00000100 F2806x_GlobalVariableDefs.obj (PieVectTableFile)
EmuKeyVar
* 1 00000d00 00000001 UNINITIALIZED
00000d00 00000001 F2806x_GlobalVariableDefs.obj (EmuKeyVar)
EmuBModeVar
* 1 00000d01 00000001 UNINITIALIZED
00000d01 00000001 F2806x_GlobalVariableDefs.obj (EmuBModeVar)
FlashCallbackVar
* 1 00000d02 00000002 UNINITIALIZED
00000d02 00000002 F2806x_GlobalVariableDefs.obj (FlashCallbackVar)
FlashScalingVar
* 1 00000d04 00000002 UNINITIALIZED
00000d04 00000002 F2806x_GlobalVariableDefs.obj (FlashScalingVar)
DmaRegsFile
* 1 00001000 000000e0 UNINITIALIZED
00001000 000000e0 F2806x_GlobalVariableDefs.obj (DmaRegsFile)
Cla1RegsFile
* 1 00001400 00000040 UNINITIALIZED
00001400 00000040 F2806x_GlobalVariableDefs.obj (Cla1RegsFile)
McbspaRegsFile
* 1 00005000 00000024 UNINITIALIZED
00005000 00000024 F2806x_GlobalVariableDefs.obj (McbspaRegsFile)
ECanaRegsFile
* 1 00006000 00000034 UNINITIALIZED
00006000 00000034 F2806x_GlobalVariableDefs.obj (ECanaRegsFile)
ECanaLAMRegsFile
* 1 00006040 00000040 UNINITIALIZED
00006040 00000040 F2806x_GlobalVariableDefs.obj (ECanaLAMRegsFile)
ECanaMOTSRegsFile
* 1 00006080 00000040 UNINITIALIZED
00006080 00000040 F2806x_GlobalVariableDefs.obj (ECanaMOTSRegsFile)
ECanaMOTORegsFile
* 1 000060c0 00000040 UNINITIALIZED
000060c0 00000040 F2806x_GlobalVariableDefs.obj (ECanaMOTORegsFile)
ECanaMboxesFile
* 1 00006100 00000100 UNINITIALIZED
00006100 00000100 F2806x_GlobalVariableDefs.obj (ECanaMboxesFile)
Comp1RegsFile
* 1 00006400 00000007 UNINITIALIZED
00006400 00000007 F2806x_GlobalVariableDefs.obj (Comp1RegsFile)
Comp2RegsFile
* 1 00006420 00000007 UNINITIALIZED
00006420 00000007 F2806x_GlobalVariableDefs.obj (Comp2RegsFile)
Comp3RegsFile
* 1 00006440 00000007 UNINITIALIZED
00006440 00000007 F2806x_GlobalVariableDefs.obj (Comp3RegsFile)
EPwm1RegsFile
* 1 00006800 00000040 UNINITIALIZED
00006800 00000040 F2806x_GlobalVariableDefs.obj (EPwm1RegsFile)
EPwm2RegsFile
* 1 00006840 00000040 UNINITIALIZED
00006840 00000040 F2806x_GlobalVariableDefs.obj (EPwm2RegsFile)
EPwm3RegsFile
* 1 00006880 00000040 UNINITIALIZED
00006880 00000040 F2806x_GlobalVariableDefs.obj (EPwm3RegsFile)
EPwm4RegsFile
* 1 000068c0 00000040 UNINITIALIZED
000068c0 00000040 F2806x_GlobalVariableDefs.obj (EPwm4RegsFile)
EPwm5RegsFile
* 1 00006900 00000040 UNINITIALIZED
00006900 00000040 F2806x_GlobalVariableDefs.obj (EPwm5RegsFile)
EPwm6RegsFile
* 1 00006940 00000040 UNINITIALIZED
00006940 00000040 F2806x_GlobalVariableDefs.obj (EPwm6RegsFile)
EPwm7RegsFile
* 1 00006980 00000040 UNINITIALIZED
00006980 00000040 F2806x_GlobalVariableDefs.obj (EPwm7RegsFile)
EPwm8RegsFile
* 1 000069c0 00000040 UNINITIALIZED
000069c0 00000040 F2806x_GlobalVariableDefs.obj (EPwm8RegsFile)
ECap1RegsFile
* 1 00006a00 00000020 UNINITIALIZED
00006a00 00000020 F2806x_GlobalVariableDefs.obj (ECap1RegsFile)
ECap2RegsFile
* 1 00006a20 00000020 UNINITIALIZED
00006a20 00000020 F2806x_GlobalVariableDefs.obj (ECap2RegsFile)
ECap3RegsFile
* 1 00006a40 00000020 UNINITIALIZED
00006a40 00000020 F2806x_GlobalVariableDefs.obj (ECap3RegsFile)
EQep1RegsFile
* 1 00006b00 00000022 UNINITIALIZED
00006b00 00000022 F2806x_GlobalVariableDefs.obj (EQep1RegsFile)
EQep2RegsFile
* 1 00006b40 00000022 UNINITIALIZED
00006b40 00000022 F2806x_GlobalVariableDefs.obj (EQep2RegsFile)
GpioCtrlRegsFile
* 1 00006f80 00000040 UNINITIALIZED
00006f80 00000040 F2806x_GlobalVariableDefs.obj (GpioCtrlRegsFile)
GpioDataRegsFile
* 1 00006fc0 00000020 UNINITIALIZED
00006fc0 00000020 F2806x_GlobalVariableDefs.obj (GpioDataRegsFile)
GpioIntRegsFile
* 1 00006fe0 00000020 UNINITIALIZED
00006fe0 00000020 F2806x_GlobalVariableDefs.obj (GpioIntRegsFile)
SysCtrlRegsFile
* 1 00007010 00000030 UNINITIALIZED
00007010 00000030 F2806x_GlobalVariableDefs.obj (SysCtrlRegsFile)
SpiaRegsFile
* 1 00007040 00000010 UNINITIALIZED
00007040 00000010 F2806x_GlobalVariableDefs.obj (SpiaRegsFile)
SciaRegsFile
* 1 00007050 00000010 UNINITIALIZED
00007050 00000010 F2806x_GlobalVariableDefs.obj (SciaRegsFile)
NmiIntruptRegsFile
* 1 00007060 00000010 UNINITIALIZED
00007060 00000010 F2806x_GlobalVariableDefs.obj (NmiIntruptRegsFile)
XIntruptRegsFile
* 1 00007070 00000010 UNINITIALIZED
00007070 00000010 F2806x_GlobalVariableDefs.obj (XIntruptRegsFile)
AdcRegsFile
* 1 00007100 00000050 UNINITIALIZED
00007100 00000050 F2806x_GlobalVariableDefs.obj (AdcRegsFile)
SpibRegsFile
* 1 00007740 00000010 UNINITIALIZED
00007740 00000010 F2806x_GlobalVariableDefs.obj (SpibRegsFile)
ScibRegsFile
* 1 00007750 00000010 UNINITIALIZED
00007750 00000010 F2806x_GlobalVariableDefs.obj (ScibRegsFile)
I2caRegsFile
* 1 00007900 00000022 UNINITIALIZED
00007900 00000022 F2806x_GlobalVariableDefs.obj (I2caRegsFile)
.ebss 1 00008c00 00000324 UNINITIALIZED
00008c00 00000304 REIPERSEI-Main.obj (.ebss)
00008f04 00000018 F2806x_CpuTimers.obj (.ebss)
00008f1c 00000004 rts2800_ml.lib : _lock.obj (.ebss)
00008f20 00000004 : exit.obj (.ebss)
PartIdRegsFile
* 1 003d7e80 00000001 UNINITIALIZED
003d7e80 00000001 F2806x_GlobalVariableDefs.obj (PartIdRegsFile)
CsmPwlFile
* 1 003f7ff8 00000008 UNINITIALIZED
003f7ff8 00000008 F2806x_GlobalVariableDefs.obj (CsmPwlFile)
GLOBAL SYMBOLS: SORTED ALPHABETICALLY BY Name
address name
-------- ----
003f4000 .text
003f50e1 C$$EXIT
003f4d48 FD$$MPY
003f5054 FD$$TOL
003f4eb2 FS$$MPY
003f5090 FS$$TOFD
003f4fba FS$$TOL
003f5032 I$$DIV
003f5043 I$$MOD
003f5073 I$$TOFD
003f50c7 I$$TOFS
003f4f90 L$$DIV
003f4f9f L$$MOD
0000801f SINTAB_360
003f4fad UL$$DIV
003f4fb4 UL$$MOD
003f50fa UL$$TOFD
003f4bf4 _ADCINT1_ISR
003f4bf9 _ADCINT2_ISR
003f4ce4 _ADCINT3_ISR
003f4ce9 _ADCINT4_ISR
003f4cee _ADCINT5_ISR
003f4cf3 _ADCINT6_ISR
003f4cf8 _ADCINT7_ISR
003f4cfd _ADCINT8_ISR
003f4c08 _ADCINT9_ISR
003f41bc _ADC_init
00007100 _AdcRegs
00000b00 _AdcResult
00008c30 _Adc_Results
003f4d02 _CLA1_INT1_ISR
003f4d07 _CLA1_INT2_ISR
003f4d0c _CLA1_INT3_ISR
003f4d11 _CLA1_INT4_ISR
003f4d16 _CLA1_INT5_ISR
003f4d1b _CLA1_INT6_ISR
003f4d20 _CLA1_INT7_ISR
003f4d25 _CLA1_INT8_ISR
003f500b _CRCCalculation16
00008c22 _CRC_datiRX
00008c1e _CRCcalcolato
00001400 _Cla1Regs
00006400 _Comp1Regs
00006420 _Comp2Regs
00006440 _Comp3Regs
003f4e7e _ConfigCpuTimer
00008f14 _CpuTimer0
00000c00 _CpuTimer0Regs
00008f04 _CpuTimer1
00000c08 _CpuTimer1Regs
00008f0c _CpuTimer2
00000c10 _CpuTimer2Regs
003f7ff8 _CsmPwl
00000ae0 _CsmRegs
00008c2b _Current
003f4b9f _DATALOG_ISR
00008c17 _DC_curr
00008c16 _DC_volt
003f4c9e _DINTCH1_ISR
003f4ca3 _DINTCH2_ISR
003f4ca8 _DINTCH3_ISR
003f4cad _DINTCH4_ISR
003f4cb2 _DINTCH5_ISR
003f4cb7 _DINTCH6_ISR
0000801b _DSP28x_usDelay
00000880 _DevEmuRegs
003f49c5 _DeviceInit
00001000 _DmaRegs
003f4cda _ECAN0INTA_ISR
003f4cdf _ECAN1INTA_ISR
003f4c67 _ECAP1_INT_ISR
003f4c6c _ECAP2_INT_ISR
003f4c71 _ECAP3_INT_ISR
00006040 _ECanaLAMRegs
000060c0 _ECanaMOTORegs
00006080 _ECanaMOTSRegs
00006100 _ECanaMboxes
00006000 _ECanaRegs
00008d80 _ECanaShadow
00006a00 _ECap1Regs
003f4892 _ECap1_ISR
00006a20 _ECap2Regs
00006a40 _ECap3Regs
003f4d39 _EMPTY_ISR
003f4ba9 _EMUINT_ISR
003f4c3f _EPWM1_INT_ISR
003f4c17 _EPWM1_TZINT_ISR
003f4c44 _EPWM2_INT_ISR
003f4c1c _EPWM2_TZINT_ISR
003f4c49 _EPWM3_INT_ISR
003f4c21 _EPWM3_TZINT_ISR
003f4c4e _EPWM4_INT_ISR
003f4c26 _EPWM4_TZINT_ISR
003f4c53 _EPWM5_INT_ISR
003f4c2b _EPWM5_TZINT_ISR
003f4c58 _EPWM6_INT_ISR
003f4c30 _EPWM6_TZINT_ISR
003f4c5d _EPWM7_INT_ISR
003f4c35 _EPWM7_TZINT_ISR
003f4c62 _EPWM8_INT_ISR
003f4c3a _EPWM8_TZINT_ISR
003f4262 _EPWM_init
00006800 _EPwm1Regs
00006840 _EPwm2Regs
00006880 _EPwm3Regs
000068c0 _EPwm4Regs
00006900 _EPwm5Regs
00006940 _EPwm6Regs
00006980 _EPwm7Regs
000069c0 _EPwm8Regs
003f4c76 _EQEP1_INT_ISR
003f4c7b _EQEP2_INT_ISR
00006b00 _EQep1Regs
00006b40 _EQep2Regs
00000d01 _EmuBMode
00000d00 _EmuKey
003f5002 _EnableInterrupts
00008c62 _ErrorCount
00000a80 _FlashRegs
00000d04 _Flash_CPUScaleFactor
00000d02 _Flash_CallbackPtr
00006f80 _GpioCtrlRegs
00006fc0 _GpioDataRegs
00006fe0 _GpioIntRegs
003f4cbc _I2CINT1A_ISR
003f4cc1 _I2CINT2A_ISR
00007900 _I2caRegs
00008c03 _IDC_R
003f4bb3 _ILLEGAL_ISR
003f4b95 _INT13_ISR
003f4b9a _INT14_ISR
003fe9d8 _IQ10mpyRndSatTable
003fe9cc _IQ11mpyRndSatTable
003fe9c0 _IQ12mpyRndSatTable
003fe9b4 _IQ13mpyRndSatTable
003fe9a8 _IQ14mpyRndSatTable
003fe99c _IQ15mpyRndSatTable
003fe990 _IQ16mpyRndSatTable
003fe984 _IQ17mpyRndSatTable
003fe978 _IQ18mpyRndSatTable
003fe96c _IQ19mpyRndSatTable
003fea44 _IQ1mpyRndSatTable
003fe960 _IQ20mpyRndSatTable
003fe954 _IQ21mpyRndSatTable
003fe948 _IQ22mpyRndSatTable
003fe93c _IQ23mpyRndSatTable
003fe930 _IQ24mpyRndSatTable
003fe924 _IQ25mpyRndSatTable
003fe918 _IQ26mpyRndSatTable
003fe90c _IQ27mpyRndSatTable
003fe900 _IQ28mpyRndSatTable
003fe8f4 _IQ29mpyRndSatTable
003fea38 _IQ2mpyRndSatTable
003fe8e8 _IQ30mpyRndSatTable
003fea2c _IQ3mpyRndSatTable
003fea20 _IQ4mpyRndSatTable
003fea14 _IQ5mpyRndSatTable
003fea08 _IQ6mpyRndSatTable
003fe9fc _IQ7mpyRndSatTable
003fe9f0 _IQ8mpyRndSatTable
003fe9e4 _IQ9mpyRndSatTable
003fe724 _IQatan2HalfPITable
003fe762 _IQatan2Table
003fe8e8 _IQatan2TableEnd
003fe000 _IQcosTable
003fe402 _IQcosTableEnd
003fe402 _IQdivRoundSatTable
003fe410 _IQdivTable
003fe612 _IQdivTableEnd
003fe612 _IQisqrtRoundSatTable
003fe622 _IQisqrtTable
003fe724 _IQisqrtTableEnd
003fe8e8 _IQmpyRndSatTable
003fea50 _IQmpyRndSatTableEnd
003fdf00 _IQsinTable
003fe300 _IQsinTableEnd
003fe612 _IQsqrtRoundSatTable
003fe622 _IQsqrtTable
003fe724 _IQsqrtTableEnd
003f4b7b _ISR_ILLEGAL
003f4e45 _InitCpuTimers
003f4dcb _InitECana
00008000 _InitFlash
003f4fe3 _InitPieCtrl
00008c6c _InvSine
00008c6a _InvSine1
00008c78 _InvSine2
00008c7e _InvSine3
00008c64 _InvSine_S
00008c66 _InvSine_T
00008c70 _InvSine_div100
00008c68 _InvSine_neg
00008c98 _Irms_R
00008c12 _Irms_R_amp
00008c94 _Irms_S
00008c11 _Irms_S_amp
00008c92 _Irms_T
00008c13 _Irms_T_amp
00008c2c _LAPWM
003f4d34 _LUF_ISR
003f4d2f _LVF_ISR
00008c58 _MB0_ID
00008c5a _MB16_ID
00008c3e _MB17_ID
00008c48 _MB18_ID
00008c46 _MB19_ID
00008c4c _MB20_ID
00008c44 _MB_ID_RX
003f4c94 _MRINTA_ISR
003f4c99 _MXINTA_ISR
00005000 _McbspaRegs
003f4b80 _MemCopy
00008c56 _MessageReceivedCount
003f4bae _NMI_ISR
00007060 _NmiIntruptRegs
00008c7a _Offset_Volt
00008c82 _PEPPE
003f4d3e _PIE_RESERVED
003f4b08 _PLLset
003d7e80 _PartIdRegs
00008c54 _PassCount
003f4b40 _PieCntlInit
00000ce0 _PieCtrlRegs
00000d00 _PieVectTable
003f4b5f _PieVectTableInit
003f4ba4 _RTOSINT_ISR
003f5311 _RamfuncsLoadEnd
003f52f2 _RamfuncsLoadStart
00008000 _RamfuncsRunStart
003f4cc6 _SCIRXINTA_ISR
003f4cd0 _SCIRXINTB_ISR
003f4ccb _SCITXINTA_ISR
003f4cd5 _SCITXINTB_ISR
003f4f50 _SGENT_3D_calc
00008c29 _SOCAh
00008c2a _SOCX100
003f4c80 _SPIRXINTA_ISR
003f4c8a _SPIRXINTB_ISR
003f4c85 _SPITXINTA_ISR
003f4c8f _SPITXINTB_ISR
003f4311 _SPI_init
003f4121 _SPLL_1ph_init
00007050 _SciaRegs
00007750 _ScibRegs
00007040 _SpiaRegs
00007740 _SpibRegs
00007010 _SysCtrlRegs
00000985 _SysPwrCtrlRegs
003f4c0d _TINT0_ISR
00008c52 _TestMbox1
00008c4e _TestMbox2
00008c50 _TestMbox3
00008c01 _Tmax
00008c10 _Tmax_ID
00008c0a _Tmed
00008c0b _Tmin
00008c0f _Tmin_ID
003f4be5 _USER10_ISR
003f4bea _USER11_ISR
003f4bef _USER12_ISR
003f4bb8 _USER1_ISR
003f4bbd _USER2_ISR
003f4bc2 _USER3_ISR
003f4bc7 _USER4_ISR
003f4bcc _USER5_ISR
003f4bd1 _USER6_ISR
003f4bd6 _USER7_ISR
003f4bdb _USER8_ISR
003f4be0 _USER9_ISR
00008c1a _V_in_camp
00008c4a _V_in_camp3
00008c86 _Vac_in
00008c76 _VavgReal
00008c07 _Vmax
00008c09 _Vmax_ID
00008c02 _Vmed
00008c04 _Vmin
00008c00 _Vmin_ID
00008cca _Vrms
00008c8a _Vrms_R
00008c08 _Vrms_R_volt
00008c9a _Vrms_S
00008c05 _Vrms_S_volt
00008c96 _Vrms_T
00008c06 _Vrms_T_volt
00008c6e _Vrms_old_R
00008c28 _Vtot
003f4c12 _WAKEINT_ISR
003f4b00 _WDogDisable
003f4bfe _XINT1_ISR
003f4c03 _XINT2_ISR
003f4d2a _XINT3_ISR
00007070 _XIntruptRegs
003f5222 __IQ16div
003f5269 __IQ3div
003f52b0 __IQ3sqrt
000003d0 __STACK_END
00000380 __STACK_SIZE
00000001 __TI_args_main
ffffffff ___binit__
ffffffff ___c_args__
003f5121 ___cinit__
003f5121 ___etext__
ffffffff ___pinit__
003f4000 ___text__
003f50ac __args_main
00008f20 __cleanup_ptr
00008f22 __dtors_ptr
00008f1e __lock
003f5118 __nop
003f5114 __register_lock
003f5110 __register_unlock
00000050 __stack
00008f1c __unlock
003f50e1 _abort
00008c90 _appoggio_variabile
00008cc0 _array_datah
00008cb6 _array_datal
00008c18 _batt_curr
00008c24 _batt_volt
00008c20 _buttalo
00008c0c _byte_alarm1
00008c39 _byte_alarm2
00008c38 _byte_alarm3
003f4f0c _c_int00
003f4811 _cpu_timer0_isr
00008c8e _divisore_freq
00008c3a _duty_cycle_A
00008c37 _duty_cycle_B
00008c3b _duty_cycle_C
003f50e3 _exit
00008c3c _faseR_camp
00008c60 _faseS_camp
00008c1c _fase_S_camp
00008c19 _fase_s
00008c14 _flag
00008c9e _freq_hi
00008ca2 _freq_low
00008c25 _freq_spll
00008c72 _frequenza
00008c9c _frequenza_HZ
00008c88 _frequenza_xsgen
00008c0e _i
00008c26 _i_tx
00008c27 _indice_spll
00008c2d _j
00008c74 _kappa
003f49ae _mailbox_read
003f432f _main
00008cb0 _n_indice
00008c15 _n_int
00008c1b _n_pllKO
00008c1d _n_spi
00008c23 _no_ZCD
00008c8c _periodo
00008ca0 _periodo_15
00008c80 _phase_diff
00008c1f _poly
00008c7c _prova_freq
00008c5c _pwm_R
00008c5e _pwm_S
00008c40 _quadrati
00008d00 _rdata
00008cab _rdata_ADE
003f4917 _rms_calc
003f4d43 _rsvd_ISR
00008ce2 _sgen
00008cd6 _somma
00008c42 _somma_sqrt
00008dc0 _spll1
00008c0d _stato_BMS
00008c2e _stato_ingressi
00008c2f _stato_uscite
00008d40 _tdata
00008ca6 _tdata_ADE
00008c21 _theta
00008c84 _theta_MSB
00008ca4 _var_float
00008e00 _vettore_spll
00008c32 _x11
00008c35 _x12
00008c34 _x13
00008c33 _x21
00008c36 _x22
00008c31 _x23
ffffffff binit
003f5121 cinit
003f7ff6 code_start
003f5121 etext
ffffffff pinit
GLOBAL SYMBOLS: SORTED BY Symbol Address
address name
-------- ----
00000001 __TI_args_main
00000050 __stack
00000380 __STACK_SIZE
000003d0 __STACK_END
00000880 _DevEmuRegs
00000985 _SysPwrCtrlRegs
00000a80 _FlashRegs
00000ae0 _CsmRegs
00000b00 _AdcResult
00000c00 _CpuTimer0Regs
00000c08 _CpuTimer1Regs
00000c10 _CpuTimer2Regs
00000ce0 _PieCtrlRegs
00000d00 _EmuKey
00000d00 _PieVectTable
00000d01 _EmuBMode
00000d02 _Flash_CallbackPtr
00000d04 _Flash_CPUScaleFactor
00001000 _DmaRegs
00001400 _Cla1Regs
00005000 _McbspaRegs
00006000 _ECanaRegs
00006040 _ECanaLAMRegs
00006080 _ECanaMOTSRegs
000060c0 _ECanaMOTORegs
00006100 _ECanaMboxes
00006400 _Comp1Regs
00006420 _Comp2Regs
00006440 _Comp3Regs
00006800 _EPwm1Regs
00006840 _EPwm2Regs
00006880 _EPwm3Regs
000068c0 _EPwm4Regs
00006900 _EPwm5Regs
00006940 _EPwm6Regs
00006980 _EPwm7Regs
000069c0 _EPwm8Regs
00006a00 _ECap1Regs
00006a20 _ECap2Regs
00006a40 _ECap3Regs
00006b00 _EQep1Regs
00006b40 _EQep2Regs
00006f80 _GpioCtrlRegs
00006fc0 _GpioDataRegs
00006fe0 _GpioIntRegs
00007010 _SysCtrlRegs
00007040 _SpiaRegs
00007050 _SciaRegs
00007060 _NmiIntruptRegs
00007070 _XIntruptRegs
00007100 _AdcRegs
00007740 _SpibRegs
00007750 _ScibRegs
00007900 _I2caRegs
00008000 _InitFlash
00008000 _RamfuncsRunStart
0000801b _DSP28x_usDelay
0000801f SINTAB_360
00008c00 _Vmin_ID
00008c01 _Tmax
00008c02 _Vmed
00008c03 _IDC_R
00008c04 _Vmin
00008c05 _Vrms_S_volt
00008c06 _Vrms_T_volt
00008c07 _Vmax
00008c08 _Vrms_R_volt
00008c09 _Vmax_ID
00008c0a _Tmed
00008c0b _Tmin
00008c0c _byte_alarm1
00008c0d _stato_BMS
00008c0e _i
00008c0f _Tmin_ID
00008c10 _Tmax_ID
00008c11 _Irms_S_amp
00008c12 _Irms_R_amp
00008c13 _Irms_T_amp
00008c14 _flag
00008c15 _n_int
00008c16 _DC_volt
00008c17 _DC_curr
00008c18 _batt_curr
00008c19 _fase_s
00008c1a _V_in_camp
00008c1b _n_pllKO
00008c1c _fase_S_camp
00008c1d _n_spi
00008c1e _CRCcalcolato
00008c1f _poly
00008c20 _buttalo
00008c21 _theta
00008c22 _CRC_datiRX
00008c23 _no_ZCD
00008c24 _batt_volt
00008c25 _freq_spll
00008c26 _i_tx
00008c27 _indice_spll
00008c28 _Vtot
00008c29 _SOCAh
00008c2a _SOCX100
00008c2b _Current
00008c2c _LAPWM
00008c2d _j
00008c2e _stato_ingressi
00008c2f _stato_uscite
00008c30 _Adc_Results
00008c31 _x23
00008c32 _x11
00008c33 _x21
00008c34 _x13
00008c35 _x12
00008c36 _x22
00008c37 _duty_cycle_B
00008c38 _byte_alarm3
00008c39 _byte_alarm2
00008c3a _duty_cycle_A
00008c3b _duty_cycle_C
00008c3c _faseR_camp
00008c3e _MB17_ID
00008c40 _quadrati
00008c42 _somma_sqrt
00008c44 _MB_ID_RX
00008c46 _MB19_ID
00008c48 _MB18_ID
00008c4a _V_in_camp3
00008c4c _MB20_ID
00008c4e _TestMbox2
00008c50 _TestMbox3
00008c52 _TestMbox1
00008c54 _PassCount
00008c56 _MessageReceivedCount
00008c58 _MB0_ID
00008c5a _MB16_ID
00008c5c _pwm_R
00008c5e _pwm_S
00008c60 _faseS_camp
00008c62 _ErrorCount
00008c64 _InvSine_S
00008c66 _InvSine_T
00008c68 _InvSine_neg
00008c6a _InvSine1
00008c6c _InvSine
00008c6e _Vrms_old_R
00008c70 _InvSine_div100
00008c72 _frequenza
00008c74 _kappa
00008c76 _VavgReal
00008c78 _InvSine2
00008c7a _Offset_Volt
00008c7c _prova_freq
00008c7e _InvSine3
00008c80 _phase_diff
00008c82 _PEPPE
00008c84 _theta_MSB
00008c86 _Vac_in
00008c88 _frequenza_xsgen
00008c8a _Vrms_R
00008c8c _periodo
00008c8e _divisore_freq
00008c90 _appoggio_variabile
00008c92 _Irms_T
00008c94 _Irms_S
00008c96 _Vrms_T
00008c98 _Irms_R
00008c9a _Vrms_S
00008c9c _frequenza_HZ
00008c9e _freq_hi
00008ca0 _periodo_15
00008ca2 _freq_low
00008ca4 _var_float
00008ca6 _tdata_ADE
00008cab _rdata_ADE
00008cb0 _n_indice
00008cb6 _array_datal
00008cc0 _array_datah
00008cca _Vrms
00008cd6 _somma
00008ce2 _sgen
00008d00 _rdata
00008d40 _tdata
00008d80 _ECanaShadow
00008dc0 _spll1
00008e00 _vettore_spll
00008f04 _CpuTimer1
00008f0c _CpuTimer2
00008f14 _CpuTimer0
00008f1c __unlock
00008f1e __lock
00008f20 __cleanup_ptr
00008f22 __dtors_ptr
003d7e80 _PartIdRegs
003f4000 .text
003f4000 ___text__
003f4121 _SPLL_1ph_init
003f41bc _ADC_init
003f4262 _EPWM_init
003f4311 _SPI_init
003f432f _main
003f4811 _cpu_timer0_isr
003f4892 _ECap1_ISR
003f4917 _rms_calc
003f49ae _mailbox_read
003f49c5 _DeviceInit
003f4b00 _WDogDisable
003f4b08 _PLLset
003f4b40 _PieCntlInit
003f4b5f _PieVectTableInit
003f4b7b _ISR_ILLEGAL
003f4b80 _MemCopy
003f4b95 _INT13_ISR
003f4b9a _INT14_ISR
003f4b9f _DATALOG_ISR
003f4ba4 _RTOSINT_ISR
003f4ba9 _EMUINT_ISR
003f4bae _NMI_ISR
003f4bb3 _ILLEGAL_ISR
003f4bb8 _USER1_ISR
003f4bbd _USER2_ISR
003f4bc2 _USER3_ISR
003f4bc7 _USER4_ISR
003f4bcc _USER5_ISR
003f4bd1 _USER6_ISR
003f4bd6 _USER7_ISR
003f4bdb _USER8_ISR
003f4be0 _USER9_ISR
003f4be5 _USER10_ISR
003f4bea _USER11_ISR
003f4bef _USER12_ISR
003f4bf4 _ADCINT1_ISR
003f4bf9 _ADCINT2_ISR
003f4bfe _XINT1_ISR
003f4c03 _XINT2_ISR
003f4c08 _ADCINT9_ISR
003f4c0d _TINT0_ISR
003f4c12 _WAKEINT_ISR
003f4c17 _EPWM1_TZINT_ISR
003f4c1c _EPWM2_TZINT_ISR
003f4c21 _EPWM3_TZINT_ISR
003f4c26 _EPWM4_TZINT_ISR
003f4c2b _EPWM5_TZINT_ISR
003f4c30 _EPWM6_TZINT_ISR
003f4c35 _EPWM7_TZINT_ISR
003f4c3a _EPWM8_TZINT_ISR
003f4c3f _EPWM1_INT_ISR
003f4c44 _EPWM2_INT_ISR
003f4c49 _EPWM3_INT_ISR
003f4c4e _EPWM4_INT_ISR
003f4c53 _EPWM5_INT_ISR
003f4c58 _EPWM6_INT_ISR
003f4c5d _EPWM7_INT_ISR
003f4c62 _EPWM8_INT_ISR
003f4c67 _ECAP1_INT_ISR
003f4c6c _ECAP2_INT_ISR
003f4c71 _ECAP3_INT_ISR
003f4c76 _EQEP1_INT_ISR
003f4c7b _EQEP2_INT_ISR
003f4c80 _SPIRXINTA_ISR
003f4c85 _SPITXINTA_ISR
003f4c8a _SPIRXINTB_ISR
003f4c8f _SPITXINTB_ISR
003f4c94 _MRINTA_ISR
003f4c99 _MXINTA_ISR
003f4c9e _DINTCH1_ISR
003f4ca3 _DINTCH2_ISR
003f4ca8 _DINTCH3_ISR
003f4cad _DINTCH4_ISR
003f4cb2 _DINTCH5_ISR
003f4cb7 _DINTCH6_ISR
003f4cbc _I2CINT1A_ISR
003f4cc1 _I2CINT2A_ISR
003f4cc6 _SCIRXINTA_ISR
003f4ccb _SCITXINTA_ISR
003f4cd0 _SCIRXINTB_ISR
003f4cd5 _SCITXINTB_ISR
003f4cda _ECAN0INTA_ISR
003f4cdf _ECAN1INTA_ISR
003f4ce4 _ADCINT3_ISR
003f4ce9 _ADCINT4_ISR
003f4cee _ADCINT5_ISR
003f4cf3 _ADCINT6_ISR
003f4cf8 _ADCINT7_ISR
003f4cfd _ADCINT8_ISR
003f4d02 _CLA1_INT1_ISR
003f4d07 _CLA1_INT2_ISR
003f4d0c _CLA1_INT3_ISR
003f4d11 _CLA1_INT4_ISR
003f4d16 _CLA1_INT5_ISR
003f4d1b _CLA1_INT6_ISR
003f4d20 _CLA1_INT7_ISR
003f4d25 _CLA1_INT8_ISR
003f4d2a _XINT3_ISR
003f4d2f _LVF_ISR
003f4d34 _LUF_ISR
003f4d39 _EMPTY_ISR
003f4d3e _PIE_RESERVED
003f4d43 _rsvd_ISR
003f4d48 FD$$MPY
003f4dcb _InitECana
003f4e45 _InitCpuTimers
003f4e7e _ConfigCpuTimer
003f4eb2 FS$$MPY
003f4f0c _c_int00
003f4f50 _SGENT_3D_calc
003f4f90 L$$DIV
003f4f9f L$$MOD
003f4fad UL$$DIV
003f4fb4 UL$$MOD
003f4fba FS$$TOL
003f4fe3 _InitPieCtrl
003f5002 _EnableInterrupts
003f500b _CRCCalculation16
003f5032 I$$DIV
003f5043 I$$MOD
003f5054 FD$$TOL
003f5073 I$$TOFD
003f5090 FS$$TOFD
003f50ac __args_main
003f50c7 I$$TOFS
003f50e1 C$$EXIT
003f50e1 _abort
003f50e3 _exit
003f50fa UL$$TOFD
003f5110 __register_unlock
003f5114 __register_lock
003f5118 __nop
003f5121 ___cinit__
003f5121 ___etext__
003f5121 cinit
003f5121 etext
003f5222 __IQ16div
003f5269 __IQ3div
003f52b0 __IQ3sqrt
003f52f2 _RamfuncsLoadStart
003f5311 _RamfuncsLoadEnd
003f7ff6 code_start
003f7ff8 _CsmPwl
003fdf00 _IQsinTable
003fe000 _IQcosTable
003fe300 _IQsinTableEnd
003fe402 _IQcosTableEnd
003fe402 _IQdivRoundSatTable
003fe410 _IQdivTable
003fe612 _IQdivTableEnd
003fe612 _IQisqrtRoundSatTable
003fe612 _IQsqrtRoundSatTable
003fe622 _IQisqrtTable
003fe622 _IQsqrtTable
003fe724 _IQatan2HalfPITable
003fe724 _IQisqrtTableEnd
003fe724 _IQsqrtTableEnd
003fe762 _IQatan2Table
003fe8e8 _IQ30mpyRndSatTable
003fe8e8 _IQatan2TableEnd
003fe8e8 _IQmpyRndSatTable
003fe8f4 _IQ29mpyRndSatTable
003fe900 _IQ28mpyRndSatTable
003fe90c _IQ27mpyRndSatTable
003fe918 _IQ26mpyRndSatTable
003fe924 _IQ25mpyRndSatTable
003fe930 _IQ24mpyRndSatTable
003fe93c _IQ23mpyRndSatTable
003fe948 _IQ22mpyRndSatTable
003fe954 _IQ21mpyRndSatTable
003fe960 _IQ20mpyRndSatTable
003fe96c _IQ19mpyRndSatTable
003fe978 _IQ18mpyRndSatTable
003fe984 _IQ17mpyRndSatTable
003fe990 _IQ16mpyRndSatTable
003fe99c _IQ15mpyRndSatTable
003fe9a8 _IQ14mpyRndSatTable
003fe9b4 _IQ13mpyRndSatTable
003fe9c0 _IQ12mpyRndSatTable
003fe9cc _IQ11mpyRndSatTable
003fe9d8 _IQ10mpyRndSatTable
003fe9e4 _IQ9mpyRndSatTable
003fe9f0 _IQ8mpyRndSatTable
003fe9fc _IQ7mpyRndSatTable
003fea08 _IQ6mpyRndSatTable
003fea14 _IQ5mpyRndSatTable
003fea20 _IQ4mpyRndSatTable
003fea2c _IQ3mpyRndSatTable
003fea38 _IQ2mpyRndSatTable
003fea44 _IQ1mpyRndSatTable
003fea50 _IQmpyRndSatTableEnd
ffffffff ___binit__
ffffffff ___c_args__
ffffffff ___pinit__
ffffffff binit
ffffffff pinit
[390 symbols]
******************************************************************************
TMS320C2000 Linker PC v5.2.12
******************************************************************************
>> Linked Fri May 17 19:03:15 2013
OUTPUT FILE NAME: <AsymmetricPWM.out>
ENTRY POINT SYMBOL: "_c_int00" address: 003f50b1
MEMORY CONFIGURATION
name origin length used unused attr fill
---------------------- -------- --------- -------- -------- ---- --------
PAGE 0:
BEGIN 00000000 00000002 00000002 00000000 RWIX
BOOT_RSVD 00000000 00000050 00000000 00000050 RWIX
BOOT_RSVD 00000002 0000004e 00000000 0000004e RWIX
RAMM0 00000050 000003b0 00000101 000002af RWIX
progRAM 00008000 00000800 0000001f 000007e1 RWIX
progRAM 00008000 00000c00 00000000 00000c00 RWIX
OTP 003d7800 00000400 00000000 00000400 RWIX
FLASHH 003d8000 00004000 00000000 00004000 RWIX
FLASHG 003dc000 00004000 00000000 00004000 RWIX
FLASHF 003e0000 00004000 00000000 00004000 RWIX
FLASHE 003e4000 00004000 00000000 00004000 RWIX
FLASHD 003e8000 00004000 00000000 00004000 RWIX
FLASHC 003ec000 00004000 00000000 00004000 RWIX
FLASHA 003f4000 00003f80 00001634 0000294c RWIX
CSM_RSVD 003f7f80 00000076 00000000 00000076 RWIX
BEGIN 003f7ff6 00000002 00000000 00000002 RWIX
CSM_PWL 003f7ff8 00000008 00000000 00000008 RWIX
FPUTABLES 003fd860 000006a0 00000000 000006a0 RWIX
FPUTABLES 003fd860 000006a0 00000000 000006a0 RWIX
IQTABLES 003fdf00 00000b50 00000b50 00000000 RWIX
IQTABLES 003fdf00 00000b50 00000000 00000b50 RWIX
IQTABLES2 003fea50 0000008c 00000000 0000008c RWIX
IQTABLES2 003fea50 0000008c 00000000 0000008c RWIX
IQTABLES3 003feadc 000000aa 00000000 000000aa RWIX
IQTABLES3 003feadc 000000aa 00000000 000000aa RWIX
BOOTROM 003ff3b0 00000c10 00000000 00000c10 RWIX
BOOTROM 003ff3b0 00000c10 00000000 00000c10 RWIX
RESET 003fffc0 00000002 00000000 00000002 RWIX
RESET 003fffc0 00000002 00000000 00000002 RWIX
VECTORS 003fffc2 0000003e 00000000 0000003e RWIX
PAGE 1:
RAMM0 00000050 000003b0 00000380 00000030 RWIX
RAMM1 00000400 00000400 00000000 00000400 RWIX
RAMM1 00000480 00000380 00000000 00000380 RWIX
DEV_EMU 00000880 00000105 00000004 00000101 RWIX
SYS_PWR_CTL 00000985 00000003 00000003 00000000 RWIX
FLASH_REGS 00000a80 00000060 00000008 00000058 RWIX
CSM 00000ae0 00000020 00000010 00000010 RWIX
ADC_RESULT 00000b00 00000020 00000010 00000010 RWIX
CPU_TIMER0 00000c00 00000008 00000008 00000000 RWIX
CPU_TIMER1 00000c08 00000008 00000008 00000000 RWIX
CPU_TIMER2 00000c10 00000008 00000008 00000000 RWIX
PIE_CTRL 00000ce0 00000020 0000001a 00000006 RWIX
PIE_VECT 00000d00 00000100 00000100 00000000 RWIX
DMA 00001000 00000200 000000e0 00000120 RWIX
CLA1 00001400 00000080 00000040 00000040 RWIX
McBSPA 00005000 00000040 00000024 0000001c RWIX
ECANA 00006000 00000040 00000034 0000000c RWIX
ECANA_LAM 00006040 00000040 00000040 00000000 RWIX
ECANA_MOTS 00006080 00000040 00000040 00000000 RWIX
ECANA_MOTO 000060c0 00000040 00000040 00000000 RWIX
ECANA_MBOX 00006100 00000100 00000100 00000000 RWIX
COMP1 00006400 00000020 00000007 00000019 RWIX
COMP2 00006420 00000020 00000007 00000019 RWIX
COMP3 00006440 00000020 00000007 00000019 RWIX
EPWM1 00006800 00000040 00000040 00000000 RWIX
EPWM2 00006840 00000040 00000040 00000000 RWIX
EPWM3 00006880 00000040 00000040 00000000 RWIX
EPWM4 000068c0 00000040 00000040 00000000 RWIX
EPWM5 00006900 00000040 00000040 00000000 RWIX
EPWM6 00006940 00000040 00000040 00000000 RWIX
EPWM7 00006980 00000040 00000040 00000000 RWIX
EPWM8 000069c0 00000040 00000040 00000000 RWIX
ECAP1 00006a00 00000020 00000020 00000000 RWIX
ECAP2 00006a20 00000020 00000020 00000000 RWIX
ECAP3 00006a40 00000020 00000020 00000000 RWIX
EQEP1 00006b00 00000040 00000022 0000001e RWIX
EQEP2 00006b40 00000040 00000022 0000001e RWIX
GPIOCTRL 00006f80 00000040 00000040 00000000 RWIX
GPIODAT 00006fc0 00000020 00000020 00000000 RWIX
GPIOINT 00006fe0 00000020 00000020 00000000 RWIX
SYSTEM 00007010 00000030 00000030 00000000 RWIX
SPIA 00007040 00000010 00000010 00000000 RWIX
SCIA 00007050 00000010 00000010 00000000 RWIX
NMIINTRUPT 00007060 00000010 00000010 00000000 RWIX
XINTRUPT 00007070 00000010 00000010 00000000 RWIX
ADC 00007100 00000080 00000050 00000030 RWIX
SPIB 00007740 00000010 00000010 00000000 RWIX
SCIB 00007750 00000010 00000010 00000000 RWIX
I2CA 00007900 00000040 00000022 0000001e RWIX
dataRAM 00008800 00000800 00000324 000004dc RWIX
dataRAM 00008c00 00001400 00000000 00001400 RWIX
RAML4 0000a000 00002000 00000000 00002000 RWIX
RAML5 0000c000 00002000 00000000 00002000 RWIX
RAML6 0000e000 00002000 00000000 00002000 RWIX
RAML7 00010000 00002000 00000000 00002000 RWIX
RAML8 00012000 00002000 00000000 00002000 RWIX
PARTID 003d7e80 00000001 00000001 00000000 RWIX
FLASHB 003f4000 00002000 00000000 00002000 RWIX
CSM_PWL 003f7ff8 00000008 00000008 00000000 RWIX
SECTION ALLOCATION MAP
output attributes/
section page origin length input sections
-------- ---- ---------- ---------- ----------------
.pinit 0 003f4000 00000000 UNINITIALIZED
codestart
* 0 00000000 00000002
00000000 00000002 F2806x_CodeStartBranch.obj (codestart)
.cinit 0 00000050 00000000 UNINITIALIZED
.pinit 0 00000050 00000000 UNINITIALIZED
SINTBL 0 00000050 00000101
00000050 00000101 SINTB360.obj (SINTBL)
.text 0 003f4000 00001338
003f4000 000009ab REIPERSEI-Main.obj (.text)
003f49ab 000001d0 REIPERSEI-DevInit_F2806x.obj (.text)
003f4b7b 000001bf ADC_SOC_Cnf.obj (.text)
003f4d3a 000001b3 F2806x_DefaultIsr.obj (.text)
003f4eed 00000083 rts2800_ml.lib : fd_mpy.obj (.text)
003f4f70 0000007a ECAN_Init.obj (.text)
003f4fea 0000006d F2806x_CpuTimers.obj (.text)
003f5057 0000005a rts2800_ml.lib : fs_mpy.obj (.text)
003f50b1 00000044 : boot.obj (.text)
003f50f5 00000040 sgt3dc.obj (.text)
003f5135 0000002a rts2800_ml.lib : l_div.obj (.text)
003f515f 00000029 : fs_tol.obj (.text)
003f5188 00000028 F2806x_PieCtrl.obj (.text)
003f51b0 00000027 CRC16.obj (.text)
003f51d7 00000025 F2806x_PieVect.obj (.text)
003f51fc 00000023 sgt3c.obj (.text)
003f521f 00000022 rts2800_ml.lib : i_div.obj (.text)
003f5241 0000001f : fd_tol.obj (.text)
003f5260 0000001d : i_tofd.obj (.text)
003f527d 0000001c : fs_tofd.obj (.text)
003f5299 0000001b : args_main.obj (.text)
003f52b4 0000001a : i_tofs.obj (.text)
003f52ce 00000019 : exit.obj (.text)
003f52e7 00000019 sgt2c.obj (.text)
003f5300 00000016 rts2800_ml.lib : ul_tofd.obj (.text)
003f5316 00000011 sgt1c.obj (.text)
003f5327 00000009 rts2800_ml.lib : _lock.obj (.text)
003f5330 00000008 F2806x_CodeStartBranch.obj (.text)
.econst 0 003f5338 0000010c
003f5338 00000100 F2806x_PieVect.obj (.econst)
003f5438 0000000c REIPERSEI-Main.obj (.econst)
.cinit 0 003f5444 00000101
003f5444 000000eb REIPERSEI-Main.obj (.cinit)
003f552f 0000000a rts2800_ml.lib : _lock.obj (.cinit)
003f5539 0000000a : exit.obj (.cinit)
003f5543 00000002 --HOLE-- [fill = 0]
IQmath 0 003f5545 000000d0
003f5545 00000047 IQmath.lib : IQ16div.obj (IQmath)
003f558c 00000047 : IQ3div.obj (IQmath)
003f55d3 00000042 : IQ3sqrt.obj (IQmath)
ramfuncs 0 003f5615 0000001f RUN ADDR = 00008000
003f5615 0000001b REIPERSEI-DevInit_F2806x.obj (ramfuncs)
003f5630 00000004 F2806x_usDelay.obj (ramfuncs)
IQmathTables
* 0 003fdf00 00000b50 NOLOAD SECTION
003fdf00 00000b50 IQmath.lib : IQmathTables.obj (IQmathTables)
.reset 0 003fffc0 00000002 DSECT
003fffc0 00000002 rts2800_ml.lib : boot.obj (.reset)
.reset 0 003fffc0 00000000 DSECT
vectors 0 003fffc2 00000000 DSECT
.stack 1 00000050 00000380 UNINITIALIZED
00000050 00000380 --HOLE--
DevEmuRegsFile
* 1 00000880 00000004 UNINITIALIZED
00000880 00000004 F2806x_GlobalVariableDefs.obj (DevEmuRegsFile)
SysPwrCtrlRegsFile
* 1 00000985 00000003 UNINITIALIZED
00000985 00000003 F2806x_GlobalVariableDefs.obj (SysPwrCtrlRegsFile)
FlashRegsFile
* 1 00000a80 00000008 UNINITIALIZED
00000a80 00000008 F2806x_GlobalVariableDefs.obj (FlashRegsFile)
CsmRegsFile
* 1 00000ae0 00000010 UNINITIALIZED
00000ae0 00000010 F2806x_GlobalVariableDefs.obj (CsmRegsFile)
AdcResultFile
* 1 00000b00 00000010 UNINITIALIZED
00000b00 00000010 F2806x_GlobalVariableDefs.obj (AdcResultFile)
CpuTimer0RegsFile
* 1 00000c00 00000008 UNINITIALIZED
00000c00 00000008 F2806x_GlobalVariableDefs.obj (CpuTimer0RegsFile)
CpuTimer1RegsFile
* 1 00000c08 00000008 UNINITIALIZED
00000c08 00000008 F2806x_GlobalVariableDefs.obj (CpuTimer1RegsFile)
CpuTimer2RegsFile
* 1 00000c10 00000008 UNINITIALIZED
00000c10 00000008 F2806x_GlobalVariableDefs.obj (CpuTimer2RegsFile)
PieCtrlRegsFile
* 1 00000ce0 0000001a UNINITIALIZED
00000ce0 0000001a F2806x_GlobalVariableDefs.obj (PieCtrlRegsFile)
PieVectTableFile
* 1 00000d00 00000100 UNINITIALIZED
00000d00 00000100 F2806x_GlobalVariableDefs.obj (PieVectTableFile)
EmuKeyVar
* 1 00000d00 00000001 UNINITIALIZED
00000d00 00000001 F2806x_GlobalVariableDefs.obj (EmuKeyVar)
EmuBModeVar
* 1 00000d01 00000001 UNINITIALIZED
00000d01 00000001 F2806x_GlobalVariableDefs.obj (EmuBModeVar)
FlashCallbackVar
* 1 00000d02 00000002 UNINITIALIZED
00000d02 00000002 F2806x_GlobalVariableDefs.obj (FlashCallbackVar)
FlashScalingVar
* 1 00000d04 00000002 UNINITIALIZED
00000d04 00000002 F2806x_GlobalVariableDefs.obj (FlashScalingVar)
DmaRegsFile
* 1 00001000 000000e0 UNINITIALIZED
00001000 000000e0 F2806x_GlobalVariableDefs.obj (DmaRegsFile)
Cla1RegsFile
* 1 00001400 00000040 UNINITIALIZED
00001400 00000040 F2806x_GlobalVariableDefs.obj (Cla1RegsFile)
McbspaRegsFile
* 1 00005000 00000024 UNINITIALIZED
00005000 00000024 F2806x_GlobalVariableDefs.obj (McbspaRegsFile)
ECanaRegsFile
* 1 00006000 00000034 UNINITIALIZED
00006000 00000034 F2806x_GlobalVariableDefs.obj (ECanaRegsFile)
ECanaLAMRegsFile
* 1 00006040 00000040 UNINITIALIZED
00006040 00000040 F2806x_GlobalVariableDefs.obj (ECanaLAMRegsFile)
ECanaMOTSRegsFile
* 1 00006080 00000040 UNINITIALIZED
00006080 00000040 F2806x_GlobalVariableDefs.obj (ECanaMOTSRegsFile)
ECanaMOTORegsFile
* 1 000060c0 00000040 UNINITIALIZED
000060c0 00000040 F2806x_GlobalVariableDefs.obj (ECanaMOTORegsFile)
ECanaMboxesFile
* 1 00006100 00000100 UNINITIALIZED
00006100 00000100 F2806x_GlobalVariableDefs.obj (ECanaMboxesFile)
Comp1RegsFile
* 1 00006400 00000007 UNINITIALIZED
00006400 00000007 F2806x_GlobalVariableDefs.obj (Comp1RegsFile)
Comp2RegsFile
* 1 00006420 00000007 UNINITIALIZED
00006420 00000007 F2806x_GlobalVariableDefs.obj (Comp2RegsFile)
Comp3RegsFile
* 1 00006440 00000007 UNINITIALIZED
00006440 00000007 F2806x_GlobalVariableDefs.obj (Comp3RegsFile)
EPwm1RegsFile
* 1 00006800 00000040 UNINITIALIZED
00006800 00000040 F2806x_GlobalVariableDefs.obj (EPwm1RegsFile)
EPwm2RegsFile
* 1 00006840 00000040 UNINITIALIZED
00006840 00000040 F2806x_GlobalVariableDefs.obj (EPwm2RegsFile)
EPwm3RegsFile
* 1 00006880 00000040 UNINITIALIZED
00006880 00000040 F2806x_GlobalVariableDefs.obj (EPwm3RegsFile)
EPwm4RegsFile
* 1 000068c0 00000040 UNINITIALIZED
000068c0 00000040 F2806x_GlobalVariableDefs.obj (EPwm4RegsFile)
EPwm5RegsFile
* 1 00006900 00000040 UNINITIALIZED
00006900 00000040 F2806x_GlobalVariableDefs.obj (EPwm5RegsFile)
EPwm6RegsFile
* 1 00006940 00000040 UNINITIALIZED
00006940 00000040 F2806x_GlobalVariableDefs.obj (EPwm6RegsFile)
EPwm7RegsFile
* 1 00006980 00000040 UNINITIALIZED
00006980 00000040 F2806x_GlobalVariableDefs.obj (EPwm7RegsFile)
EPwm8RegsFile
* 1 000069c0 00000040 UNINITIALIZED
000069c0 00000040 F2806x_GlobalVariableDefs.obj (EPwm8RegsFile)
ECap1RegsFile
* 1 00006a00 00000020 UNINITIALIZED
00006a00 00000020 F2806x_GlobalVariableDefs.obj (ECap1RegsFile)
ECap2RegsFile
* 1 00006a20 00000020 UNINITIALIZED
00006a20 00000020 F2806x_GlobalVariableDefs.obj (ECap2RegsFile)
ECap3RegsFile
* 1 00006a40 00000020 UNINITIALIZED
00006a40 00000020 F2806x_GlobalVariableDefs.obj (ECap3RegsFile)
EQep1RegsFile
* 1 00006b00 00000022 UNINITIALIZED
00006b00 00000022 F2806x_GlobalVariableDefs.obj (EQep1RegsFile)
EQep2RegsFile
* 1 00006b40 00000022 UNINITIALIZED
00006b40 00000022 F2806x_GlobalVariableDefs.obj (EQep2RegsFile)
GpioCtrlRegsFile
* 1 00006f80 00000040 UNINITIALIZED
00006f80 00000040 F2806x_GlobalVariableDefs.obj (GpioCtrlRegsFile)
GpioDataRegsFile
* 1 00006fc0 00000020 UNINITIALIZED
00006fc0 00000020 F2806x_GlobalVariableDefs.obj (GpioDataRegsFile)
GpioIntRegsFile
* 1 00006fe0 00000020 UNINITIALIZED
00006fe0 00000020 F2806x_GlobalVariableDefs.obj (GpioIntRegsFile)
SysCtrlRegsFile
* 1 00007010 00000030 UNINITIALIZED
00007010 00000030 F2806x_GlobalVariableDefs.obj (SysCtrlRegsFile)
SpiaRegsFile
* 1 00007040 00000010 UNINITIALIZED
00007040 00000010 F2806x_GlobalVariableDefs.obj (SpiaRegsFile)
SciaRegsFile
* 1 00007050 00000010 UNINITIALIZED
00007050 00000010 F2806x_GlobalVariableDefs.obj (SciaRegsFile)
NmiIntruptRegsFile
* 1 00007060 00000010 UNINITIALIZED
00007060 00000010 F2806x_GlobalVariableDefs.obj (NmiIntruptRegsFile)
XIntruptRegsFile
* 1 00007070 00000010 UNINITIALIZED
00007070 00000010 F2806x_GlobalVariableDefs.obj (XIntruptRegsFile)
AdcRegsFile
* 1 00007100 00000050 UNINITIALIZED
00007100 00000050 F2806x_GlobalVariableDefs.obj (AdcRegsFile)
SpibRegsFile
* 1 00007740 00000010 UNINITIALIZED
00007740 00000010 F2806x_GlobalVariableDefs.obj (SpibRegsFile)
ScibRegsFile
* 1 00007750 00000010 UNINITIALIZED
00007750 00000010 F2806x_GlobalVariableDefs.obj (ScibRegsFile)
I2caRegsFile
* 1 00007900 00000022 UNINITIALIZED
00007900 00000022 F2806x_GlobalVariableDefs.obj (I2caRegsFile)
.ebss 1 00008800 00000324 UNINITIALIZED
00008800 00000304 REIPERSEI-Main.obj (.ebss)
00008b04 00000018 F2806x_CpuTimers.obj (.ebss)
00008b1c 00000004 rts2800_ml.lib : _lock.obj (.ebss)
00008b20 00000004 : exit.obj (.ebss)
PartIdRegsFile
* 1 003d7e80 00000001 UNINITIALIZED
003d7e80 00000001 F2806x_GlobalVariableDefs.obj (PartIdRegsFile)
CsmPwlFile
* 1 003f7ff8 00000008 UNINITIALIZED
003f7ff8 00000008 F2806x_GlobalVariableDefs.obj (CsmPwlFile)
GLOBAL SYMBOLS: SORTED ALPHABETICALLY BY Name
address name
-------- ----
003f4000 .text
003f52ce C$$EXIT
003f4eed FD$$MPY
003f5241 FD$$TOL
003f5057 FS$$MPY
003f527d FS$$TOFD
003f515f FS$$TOL
003f521f I$$DIV
003f5230 I$$MOD
003f5260 I$$TOFD
003f52b4 I$$TOFS
003f5135 L$$DIV
003f5144 L$$MOD
00000050 SINTAB_360
003f5152 UL$$DIV
003f5159 UL$$MOD
003f5300 UL$$TOFD
003f4d99 _ADCINT1_ISR
003f4d9e _ADCINT2_ISR
003f4e89 _ADCINT3_ISR
003f4e8e _ADCINT4_ISR
003f4e93 _ADCINT5_ISR
003f4e98 _ADCINT6_ISR
003f4e9d _ADCINT7_ISR
003f4ea2 _ADCINT8_ISR
003f4dad _ADCINT9_ISR
003f4b7b _ADC_SOC_CNF
003f41bc _ADC_init
00007100 _AdcRegs
00000b00 _AdcResult
0000883b _Adc_Results
003f4ea7 _CLA1_INT1_ISR
003f4eac _CLA1_INT2_ISR
003f4eb1 _CLA1_INT3_ISR
003f4eb6 _CLA1_INT4_ISR
003f4ebb _CLA1_INT5_ISR
003f4ec0 _CLA1_INT6_ISR
003f4ec5 _CLA1_INT7_ISR
003f4eca _CLA1_INT8_ISR
003f51b0 _CRCCalculation16
00008814 _CRC_datiRX
00008801 _CRCcalcolato
00001400 _Cla1Regs
00006400 _Comp1Regs
00006420 _Comp2Regs
00006440 _Comp3Regs
003f5023 _ConfigCpuTimer
00008b14 _CpuTimer0
00000c00 _CpuTimer0Regs
00008b04 _CpuTimer1
00000c08 _CpuTimer1Regs
00008b0c _CpuTimer2
00000c10 _CpuTimer2Regs
003f7ff8 _CsmPwl
00000ae0 _CsmRegs
0000882c _Current
003f4d44 _DATALOG_ISR
00008815 _DC_curr
0000880e _DC_volt
003f4e43 _DINTCH1_ISR
003f4e48 _DINTCH2_ISR
003f4e4d _DINTCH3_ISR
003f4e52 _DINTCH4_ISR
003f4e57 _DINTCH5_ISR
003f4e5c _DINTCH6_ISR
0000801b _DSP28x_usDelay
00000880 _DevEmuRegs
003f49ab _DeviceInit
00001000 _DmaRegs
003f4e7f _ECAN0INTA_ISR
003f4e84 _ECAN1INTA_ISR
003f4e0c _ECAP1_INT_ISR
003f4e11 _ECAP2_INT_ISR
003f4e16 _ECAP3_INT_ISR
00006040 _ECanaLAMRegs
000060c0 _ECanaMOTORegs
00006080 _ECanaMOTSRegs
00006100 _ECanaMboxes
00006000 _ECanaRegs
00008980 _ECanaShadow
00006a00 _ECap1Regs
003f4880 _ECap1_ISR
00006a20 _ECap2Regs
00006a40 _ECap3Regs
003f4ede _EMPTY_ISR
003f4d4e _EMUINT_ISR
003f4de4 _EPWM1_INT_ISR
003f4dbc _EPWM1_TZINT_ISR
003f4de9 _EPWM2_INT_ISR
003f4dc1 _EPWM2_TZINT_ISR
003f4dee _EPWM3_INT_ISR
003f4dc6 _EPWM3_TZINT_ISR
003f4df3 _EPWM4_INT_ISR
003f4dcb _EPWM4_TZINT_ISR
003f4df8 _EPWM5_INT_ISR
003f4dd0 _EPWM5_TZINT_ISR
003f4dfd _EPWM6_INT_ISR
003f4dd5 _EPWM6_TZINT_ISR
003f4e02 _EPWM7_INT_ISR
003f4dda _EPWM7_TZINT_ISR
003f4e07 _EPWM8_INT_ISR
003f4ddf _EPWM8_TZINT_ISR
003f4262 _EPWM_init
00006800 _EPwm1Regs
00006840 _EPwm2Regs
00006880 _EPwm3Regs
000068c0 _EPwm4Regs
00006900 _EPwm5Regs
00006940 _EPwm6Regs
00006980 _EPwm7Regs
000069c0 _EPwm8Regs
003f4e1b _EQEP1_INT_ISR
003f4e20 _EQEP2_INT_ISR
00006b00 _EQep1Regs
00006b40 _EQep2Regs
00000d01 _EmuBMode
00000d00 _EmuKey
003f51a7 _EnableInterrupts
0000884c _ErrorCount
00000a80 _FlashRegs
00000d04 _Flash_CPUScaleFactor
00000d02 _Flash_CallbackPtr
00006f80 _GpioCtrlRegs
00006fc0 _GpioDataRegs
00006fe0 _GpioIntRegs
003f4e61 _I2CINT1A_ISR
003f4e66 _I2CINT2A_ISR
00007900 _I2caRegs
00008807 _IDC_R
003f4d58 _ILLEGAL_ISR
003f4d3a _INT13_ISR
003f4d3f _INT14_ISR
003fe9d8 _IQ10mpyRndSatTable
003fe9cc _IQ11mpyRndSatTable
003fe9c0 _IQ12mpyRndSatTable
003fe9b4 _IQ13mpyRndSatTable
003fe9a8 _IQ14mpyRndSatTable
003fe99c _IQ15mpyRndSatTable
003fe990 _IQ16mpyRndSatTable
003fe984 _IQ17mpyRndSatTable
003fe978 _IQ18mpyRndSatTable
003fe96c _IQ19mpyRndSatTable
003fea44 _IQ1mpyRndSatTable
003fe960 _IQ20mpyRndSatTable
003fe954 _IQ21mpyRndSatTable
003fe948 _IQ22mpyRndSatTable
003fe93c _IQ23mpyRndSatTable
003fe930 _IQ24mpyRndSatTable
003fe924 _IQ25mpyRndSatTable
003fe918 _IQ26mpyRndSatTable
003fe90c _IQ27mpyRndSatTable
003fe900 _IQ28mpyRndSatTable
003fe8f4 _IQ29mpyRndSatTable
003fea38 _IQ2mpyRndSatTable
003fe8e8 _IQ30mpyRndSatTable
003fea2c _IQ3mpyRndSatTable
003fea20 _IQ4mpyRndSatTable
003fea14 _IQ5mpyRndSatTable
003fea08 _IQ6mpyRndSatTable
003fe9fc _IQ7mpyRndSatTable
003fe9f0 _IQ8mpyRndSatTable
003fe9e4 _IQ9mpyRndSatTable
003fe724 _IQatan2HalfPITable
003fe762 _IQatan2Table
003fe8e8 _IQatan2TableEnd
003fe000 _IQcosTable
003fe402 _IQcosTableEnd
003fe402 _IQdivRoundSatTable
003fe410 _IQdivTable
003fe612 _IQdivTableEnd
003fe612 _IQisqrtRoundSatTable
003fe622 _IQisqrtTable
003fe724 _IQisqrtTableEnd
003fe8e8 _IQmpyRndSatTable
003fea50 _IQmpyRndSatTableEnd
003fdf00 _IQsinTable
003fe300 _IQsinTableEnd
003fe612 _IQsqrtRoundSatTable
003fe622 _IQsqrtTable
003fe724 _IQsqrtTableEnd
003f4b61 _ISR_ILLEGAL
003f4fea _InitCpuTimers
003f4f70 _InitECana
00008000 _InitFlash
003f5188 _InitPieCtrl
003f51d7 _InitPieVectTable
00008870 _InvSine
0000886a _InvSine1
0000886e _InvSine2
00008872 _InvSine3
0000887e _InvSine_S
00008886 _InvSine_T
0000887a _InvSine_div100
00008880 _InvSine_neg
00008896 _Irms_R
00008830 _Irms_R_amp
00008894 _Irms_S
0000882b _Irms_S_amp
00008892 _Irms_T
0000882a _Irms_T_amp
0000881d _LAPWM
003f4ed9 _LUF_ISR
003f4ed4 _LVF_ISR
0000885e _MB0_ID
0000885c _MB16_ID
00008854 _MB17_ID
00008852 _MB18_ID
00008858 _MB19_ID
00008856 _MB20_ID
00008842 _MB_ID_RX
003f4e39 _MRINTA_ISR
003f4e3e _MXINTA_ISR
00005000 _McbspaRegs
003f4b66 _MemCopy
00008848 _MessageReceivedCount
003f4d53 _NMI_ISR
00007060 _NmiIntruptRegs
0000883e _Offset_Volt
000088a2 _PEPPE
003f4ee3 _PIE_RESERVED
003f4aee _PLLset
003d7e80 _PartIdRegs
0000884e _PassCount
003f4b26 _PieCntlInit
00000ce0 _PieCtrlRegs
00000d00 _PieVectTable
003f4b45 _PieVectTableInit
003f4d49 _RTOSINT_ISR
003f5634 _RamfuncsLoadEnd
003f5615 _RamfuncsLoadStart
00008000 _RamfuncsRunStart
003f4e6b _SCIRXINTA_ISR
003f4e75 _SCIRXINTB_ISR
003f4e70 _SCITXINTA_ISR
003f4e7a _SCITXINTB_ISR
003f5316 _SGENT_1_calc
003f52e7 _SGENT_2_calc
003f50f5 _SGENT_3D_calc
003f51fc _SGENT_3_calc
0000881a _SOCAh
0000881f _SOCX100
003f4e25 _SPIRXINTA_ISR
003f4e2f _SPIRXINTB_ISR
003f4e2a _SPITXINTA_ISR
003f4e34 _SPITXINTB_ISR
003f4311 _SPI_init
003f4121 _SPLL_1ph_init
00007050 _SciaRegs
00007750 _ScibRegs
00007040 _SpiaRegs
00007740 _SpibRegs
00007010 _SysCtrlRegs
00000985 _SysPwrCtrlRegs
003f4db2 _TINT0_ISR
0000884a _TestMbox1
00008850 _TestMbox2
0000885a _TestMbox3
00008829 _Tmax
00008826 _Tmax_ID
0000881c _Tmed
0000882f _Tmin
0000882d _Tmin_ID
003f4d8a _USER10_ISR
003f4d8f _USER11_ISR
003f4d94 _USER12_ISR
003f4d5d _USER1_ISR
003f4d62 _USER2_ISR
003f4d67 _USER3_ISR
003f4d6c _USER4_ISR
003f4d71 _USER5_ISR
003f4d76 _USER6_ISR
003f4d7b _USER7_ISR
003f4d80 _USER8_ISR
003f4d85 _USER9_ISR
00008812 _V_in_camp
00008890 _V_in_camp3
00008898 _Vac_in
00008866 _VavgReal
00008800 _Vmax
00008827 _Vmax_ID
00008824 _Vmed
00008825 _Vmin
0000882e _Vmin_ID
000088ca _Vrms
0000888e _Vrms_R
00008806 _Vrms_R_volt
0000888a _Vrms_S
0000880b _Vrms_S_volt
0000888c _Vrms_T
00008808 _Vrms_T_volt
0000886c _Vrms_old_R
00008821 _Vtot
003f4db7 _WAKEINT_ISR
003f4ae6 _WDogDisable
003f4da3 _XINT1_ISR
003f4da8 _XINT2_ISR
003f4ecf _XINT3_ISR
00007070 _XIntruptRegs
003f5545 __IQ16div
003f558c __IQ3div
003f55d3 __IQ3sqrt
000003d0 __STACK_END
00000380 __STACK_SIZE
00000001 __TI_args_main
ffffffff ___binit__
ffffffff ___c_args__
003f5444 ___cinit__
003f5338 ___etext__
ffffffff ___pinit__
003f4000 ___text__
003f5299 __args_main
00008b20 __cleanup_ptr
00008b22 __dtors_ptr
00008b1e __lock
003f532f __nop
003f532b __register_lock
003f5327 __register_unlock
00000050 __stack
00008b1c __unlock
003f52ce _abort
00008868 _appoggio_variabile
000088c0 _array_datah
000088b6 _array_datal
00008811 _batt_curr
0000880c _batt_volt
00008809 _buttalo
00008822 _byte_alarm1
00008819 _byte_alarm2
00008818 _byte_alarm3
003f50b1 _c_int00
003f47fb _cpu_timer0_isr
00008860 _divisore_freq
00008835 _duty_cycle_A
00008834 _duty_cycle_B
00008837 _duty_cycle_C
003f52d0 _exit
000088a0 _faseR_camp
00008846 _faseS_camp
00008803 _fase_S_camp
00008817 _fase_s
00008828 _flag
00008884 _freq_hi
00008876 _freq_low
00008816 _freq_spll
0000887c _frequenza
00008878 _frequenza_HZ
00008862 _frequenza_xsgen
0000883a _i
00008804 _i_tx
0000880f _indice_spll
00008820 _j
00008888 _kappa
003f4994 _mailbox_read
003f432f _main
000088b0 _n_indice
00008813 _n_int
00008802 _n_pllKO
00008805 _n_spi
0000880d _no_ZCD
00008864 _periodo
00008874 _periodo_15
0000889a _phase_diff
0000880a _poly
0000889e _prova_freq
0000883c _pwm_R
00008844 _pwm_S
000088a4 _quadrati
00008940 _rdata
000088a6 _rdata_ADE
003f48fd _rms_calc
003f4ee8 _rsvd_ISR
000088e2 _sgen
000088d6 _somma
00008840 _somma_sqrt
000089c0 _spll1
0000881b _stato_BMS
00008823 _stato_ingressi
0000881e _stato_uscite
00008900 _tdata
000088ab _tdata_ADE
00008810 _theta
0000889c _theta_MSB
00008882 _var_float
00008a00 _vettore_spll
00008836 _x11
00008832 _x12
00008831 _x13
00008833 _x21
00008839 _x22
00008838 _x23
ffffffff binit
003f5444 cinit
00000000 code_start
003f5338 etext
ffffffff pinit
GLOBAL SYMBOLS: SORTED BY Symbol Address
address name
-------- ----
00000000 code_start
00000001 __TI_args_main
00000050 SINTAB_360
00000050 __stack
00000380 __STACK_SIZE
000003d0 __STACK_END
00000880 _DevEmuRegs
00000985 _SysPwrCtrlRegs
00000a80 _FlashRegs
00000ae0 _CsmRegs
00000b00 _AdcResult
00000c00 _CpuTimer0Regs
00000c08 _CpuTimer1Regs
00000c10 _CpuTimer2Regs
00000ce0 _PieCtrlRegs
00000d00 _EmuKey
00000d00 _PieVectTable
00000d01 _EmuBMode
00000d02 _Flash_CallbackPtr
00000d04 _Flash_CPUScaleFactor
00001000 _DmaRegs
00001400 _Cla1Regs
00005000 _McbspaRegs
00006000 _ECanaRegs
00006040 _ECanaLAMRegs
00006080 _ECanaMOTSRegs
000060c0 _ECanaMOTORegs
00006100 _ECanaMboxes
00006400 _Comp1Regs
00006420 _Comp2Regs
00006440 _Comp3Regs
00006800 _EPwm1Regs
00006840 _EPwm2Regs
00006880 _EPwm3Regs
000068c0 _EPwm4Regs
00006900 _EPwm5Regs
00006940 _EPwm6Regs
00006980 _EPwm7Regs
000069c0 _EPwm8Regs
00006a00 _ECap1Regs
00006a20 _ECap2Regs
00006a40 _ECap3Regs
00006b00 _EQep1Regs
00006b40 _EQep2Regs
00006f80 _GpioCtrlRegs
00006fc0 _GpioDataRegs
00006fe0 _GpioIntRegs
00007010 _SysCtrlRegs
00007040 _SpiaRegs
00007050 _SciaRegs
00007060 _NmiIntruptRegs
00007070 _XIntruptRegs
00007100 _AdcRegs
00007740 _SpibRegs
00007750 _ScibRegs
00007900 _I2caRegs
00008000 _InitFlash
00008000 _RamfuncsRunStart
0000801b _DSP28x_usDelay
00008800 _Vmax
00008801 _CRCcalcolato
00008802 _n_pllKO
00008803 _fase_S_camp
00008804 _i_tx
00008805 _n_spi
00008806 _Vrms_R_volt
00008807 _IDC_R
00008808 _Vrms_T_volt
00008809 _buttalo
0000880a _poly
0000880b _Vrms_S_volt
0000880c _batt_volt
0000880d _no_ZCD
0000880e _DC_volt
0000880f _indice_spll
00008810 _theta
00008811 _batt_curr
00008812 _V_in_camp
00008813 _n_int
00008814 _CRC_datiRX
00008815 _DC_curr
00008816 _freq_spll
00008817 _fase_s
00008818 _byte_alarm3
00008819 _byte_alarm2
0000881a _SOCAh
0000881b _stato_BMS
0000881c _Tmed
0000881d _LAPWM
0000881e _stato_uscite
0000881f _SOCX100
00008820 _j
00008821 _Vtot
00008822 _byte_alarm1
00008823 _stato_ingressi
00008824 _Vmed
00008825 _Vmin
00008826 _Tmax_ID
00008827 _Vmax_ID
00008828 _flag
00008829 _Tmax
0000882a _Irms_T_amp
0000882b _Irms_S_amp
0000882c _Current
0000882d _Tmin_ID
0000882e _Vmin_ID
0000882f _Tmin
00008830 _Irms_R_amp
00008831 _x13
00008832 _x12
00008833 _x21
00008834 _duty_cycle_B
00008835 _duty_cycle_A
00008836 _x11
00008837 _duty_cycle_C
00008838 _x23
00008839 _x22
0000883a _i
0000883b _Adc_Results
0000883c _pwm_R
0000883e _Offset_Volt
00008840 _somma_sqrt
00008842 _MB_ID_RX
00008844 _pwm_S
00008846 _faseS_camp
00008848 _MessageReceivedCount
0000884a _TestMbox1
0000884c _ErrorCount
0000884e _PassCount
00008850 _TestMbox2
00008852 _MB18_ID
00008854 _MB17_ID
00008856 _MB20_ID
00008858 _MB19_ID
0000885a _TestMbox3
0000885c _MB16_ID
0000885e _MB0_ID
00008860 _divisore_freq
00008862 _frequenza_xsgen
00008864 _periodo
00008866 _VavgReal
00008868 _appoggio_variabile
0000886a _InvSine1
0000886c _Vrms_old_R
0000886e _InvSine2
00008870 _InvSine
00008872 _InvSine3
00008874 _periodo_15
00008876 _freq_low
00008878 _frequenza_HZ
0000887a _InvSine_div100
0000887c _frequenza
0000887e _InvSine_S
00008880 _InvSine_neg
00008882 _var_float
00008884 _freq_hi
00008886 _InvSine_T
00008888 _kappa
0000888a _Vrms_S
0000888c _Vrms_T
0000888e _Vrms_R
00008890 _V_in_camp3
00008892 _Irms_T
00008894 _Irms_S
00008896 _Irms_R
00008898 _Vac_in
0000889a _phase_diff
0000889c _theta_MSB
0000889e _prova_freq
000088a0 _faseR_camp
000088a2 _PEPPE
000088a4 _quadrati
000088a6 _rdata_ADE
000088ab _tdata_ADE
000088b0 _n_indice
000088b6 _array_datal
000088c0 _array_datah
000088ca _Vrms
000088d6 _somma
000088e2 _sgen
00008900 _tdata
00008940 _rdata
00008980 _ECanaShadow
000089c0 _spll1
00008a00 _vettore_spll
00008b04 _CpuTimer1
00008b0c _CpuTimer2
00008b14 _CpuTimer0
00008b1c __unlock
00008b1e __lock
00008b20 __cleanup_ptr
00008b22 __dtors_ptr
003d7e80 _PartIdRegs
003f4000 .text
003f4000 ___text__
003f4121 _SPLL_1ph_init
003f41bc _ADC_init
003f4262 _EPWM_init
003f4311 _SPI_init
003f432f _main
003f47fb _cpu_timer0_isr
003f4880 _ECap1_ISR
003f48fd _rms_calc
003f4994 _mailbox_read
003f49ab _DeviceInit
003f4ae6 _WDogDisable
003f4aee _PLLset
003f4b26 _PieCntlInit
003f4b45 _PieVectTableInit
003f4b61 _ISR_ILLEGAL
003f4b66 _MemCopy
003f4b7b _ADC_SOC_CNF
003f4d3a _INT13_ISR
003f4d3f _INT14_ISR
003f4d44 _DATALOG_ISR
003f4d49 _RTOSINT_ISR
003f4d4e _EMUINT_ISR
003f4d53 _NMI_ISR
003f4d58 _ILLEGAL_ISR
003f4d5d _USER1_ISR
003f4d62 _USER2_ISR
003f4d67 _USER3_ISR
003f4d6c _USER4_ISR
003f4d71 _USER5_ISR
003f4d76 _USER6_ISR
003f4d7b _USER7_ISR
003f4d80 _USER8_ISR
003f4d85 _USER9_ISR
003f4d8a _USER10_ISR
003f4d8f _USER11_ISR
003f4d94 _USER12_ISR
003f4d99 _ADCINT1_ISR
003f4d9e _ADCINT2_ISR
003f4da3 _XINT1_ISR
003f4da8 _XINT2_ISR
003f4dad _ADCINT9_ISR
003f4db2 _TINT0_ISR
003f4db7 _WAKEINT_ISR
003f4dbc _EPWM1_TZINT_ISR
003f4dc1 _EPWM2_TZINT_ISR
003f4dc6 _EPWM3_TZINT_ISR
003f4dcb _EPWM4_TZINT_ISR
003f4dd0 _EPWM5_TZINT_ISR
003f4dd5 _EPWM6_TZINT_ISR
003f4dda _EPWM7_TZINT_ISR
003f4ddf _EPWM8_TZINT_ISR
003f4de4 _EPWM1_INT_ISR
003f4de9 _EPWM2_INT_ISR
003f4dee _EPWM3_INT_ISR
003f4df3 _EPWM4_INT_ISR
003f4df8 _EPWM5_INT_ISR
003f4dfd _EPWM6_INT_ISR
003f4e02 _EPWM7_INT_ISR
003f4e07 _EPWM8_INT_ISR
003f4e0c _ECAP1_INT_ISR
003f4e11 _ECAP2_INT_ISR
003f4e16 _ECAP3_INT_ISR
003f4e1b _EQEP1_INT_ISR
003f4e20 _EQEP2_INT_ISR
003f4e25 _SPIRXINTA_ISR
003f4e2a _SPITXINTA_ISR
003f4e2f _SPIRXINTB_ISR
003f4e34 _SPITXINTB_ISR
003f4e39 _MRINTA_ISR
003f4e3e _MXINTA_ISR
003f4e43 _DINTCH1_ISR
003f4e48 _DINTCH2_ISR
003f4e4d _DINTCH3_ISR
003f4e52 _DINTCH4_ISR
003f4e57 _DINTCH5_ISR
003f4e5c _DINTCH6_ISR
003f4e61 _I2CINT1A_ISR
003f4e66 _I2CINT2A_ISR
003f4e6b _SCIRXINTA_ISR
003f4e70 _SCITXINTA_ISR
003f4e75 _SCIRXINTB_ISR
003f4e7a _SCITXINTB_ISR
003f4e7f _ECAN0INTA_ISR
003f4e84 _ECAN1INTA_ISR
003f4e89 _ADCINT3_ISR
003f4e8e _ADCINT4_ISR
003f4e93 _ADCINT5_ISR
003f4e98 _ADCINT6_ISR
003f4e9d _ADCINT7_ISR
003f4ea2 _ADCINT8_ISR
003f4ea7 _CLA1_INT1_ISR
003f4eac _CLA1_INT2_ISR
003f4eb1 _CLA1_INT3_ISR
003f4eb6 _CLA1_INT4_ISR
003f4ebb _CLA1_INT5_ISR
003f4ec0 _CLA1_INT6_ISR
003f4ec5 _CLA1_INT7_ISR
003f4eca _CLA1_INT8_ISR
003f4ecf _XINT3_ISR
003f4ed4 _LVF_ISR
003f4ed9 _LUF_ISR
003f4ede _EMPTY_ISR
003f4ee3 _PIE_RESERVED
003f4ee8 _rsvd_ISR
003f4eed FD$$MPY
003f4f70 _InitECana
003f4fea _InitCpuTimers
003f5023 _ConfigCpuTimer
003f5057 FS$$MPY
003f50b1 _c_int00
003f50f5 _SGENT_3D_calc
003f5135 L$$DIV
003f5144 L$$MOD
003f5152 UL$$DIV
003f5159 UL$$MOD
003f515f FS$$TOL
003f5188 _InitPieCtrl
003f51a7 _EnableInterrupts
003f51b0 _CRCCalculation16
003f51d7 _InitPieVectTable
003f51fc _SGENT_3_calc
003f521f I$$DIV
003f5230 I$$MOD
003f5241 FD$$TOL
003f5260 I$$TOFD
003f527d FS$$TOFD
003f5299 __args_main
003f52b4 I$$TOFS
003f52ce C$$EXIT
003f52ce _abort
003f52d0 _exit
003f52e7 _SGENT_2_calc
003f5300 UL$$TOFD
003f5316 _SGENT_1_calc
003f5327 __register_unlock
003f532b __register_lock
003f532f __nop
003f5338 ___etext__
003f5338 etext
003f5444 ___cinit__
003f5444 cinit
003f5545 __IQ16div
003f558c __IQ3div
003f55d3 __IQ3sqrt
003f5615 _RamfuncsLoadStart
003f5634 _RamfuncsLoadEnd
003f7ff8 _CsmPwl
003fdf00 _IQsinTable
003fe000 _IQcosTable
003fe300 _IQsinTableEnd
003fe402 _IQcosTableEnd
003fe402 _IQdivRoundSatTable
003fe410 _IQdivTable
003fe612 _IQdivTableEnd
003fe612 _IQisqrtRoundSatTable
003fe612 _IQsqrtRoundSatTable
003fe622 _IQisqrtTable
003fe622 _IQsqrtTable
003fe724 _IQatan2HalfPITable
003fe724 _IQisqrtTableEnd
003fe724 _IQsqrtTableEnd
003fe762 _IQatan2Table
003fe8e8 _IQ30mpyRndSatTable
003fe8e8 _IQatan2TableEnd
003fe8e8 _IQmpyRndSatTable
003fe8f4 _IQ29mpyRndSatTable
003fe900 _IQ28mpyRndSatTable
003fe90c _IQ27mpyRndSatTable
003fe918 _IQ26mpyRndSatTable
003fe924 _IQ25mpyRndSatTable
003fe930 _IQ24mpyRndSatTable
003fe93c _IQ23mpyRndSatTable
003fe948 _IQ22mpyRndSatTable
003fe954 _IQ21mpyRndSatTable
003fe960 _IQ20mpyRndSatTable
003fe96c _IQ19mpyRndSatTable
003fe978 _IQ18mpyRndSatTable
003fe984 _IQ17mpyRndSatTable
003fe990 _IQ16mpyRndSatTable
003fe99c _IQ15mpyRndSatTable
003fe9a8 _IQ14mpyRndSatTable
003fe9b4 _IQ13mpyRndSatTable
003fe9c0 _IQ12mpyRndSatTable
003fe9cc _IQ11mpyRndSatTable
003fe9d8 _IQ10mpyRndSatTable
003fe9e4 _IQ9mpyRndSatTable
003fe9f0 _IQ8mpyRndSatTable
003fe9fc _IQ7mpyRndSatTable
003fea08 _IQ6mpyRndSatTable
003fea14 _IQ5mpyRndSatTable
003fea20 _IQ4mpyRndSatTable
003fea2c _IQ3mpyRndSatTable
003fea38 _IQ2mpyRndSatTable
003fea44 _IQ1mpyRndSatTable
003fea50 _IQmpyRndSatTableEnd
ffffffff ___binit__
ffffffff ___c_args__
ffffffff ___pinit__
ffffffff binit
ffffffff pinit
[395 symbols]
Michele,
Michele Fiorino said:I 'm including in this message these files, because I don't understand if a routine is linked in RAM or in FLASH.
How can I change this link configuration (RAM vs FLASH)?
The problem is right at the start of the flash map file.
output attributes/
section page origin length input sections
-------- ---- ---------- ---------- ----------------
...
SINTBL 0 0000801f 00000101
0000801f 00000101 SINTB360.obj (SINTBL)
You've got the section SINTBL linked to RAM, but it is an intialized section. Modify the linker .cmd to link this section to flash memory.
- David
Excuse me David,
Why you say that SINTBL is linked to RAM?
How can I understand this?
I have got 3 linker files .cmd but in every of these isn't a SINTBL reference.
Thanks
Just look in the .map file. SINTBL has been linked starting at address 0x801F. Per the device datasheet, this is part of the L0DPSARAM memory block.
output attributes/
section page origin length input sections
-------- ---- ---------- ---------- ----------------
...
SINTBL 0 0000801f 00000101
0000801f 00000101 SINTB360.obj (SINTBL)
Michele Fiorino said:I have got 3 linker files .cmd but in every of these isn't a SINTBL reference.
That is probably the problem. You haven't specified where to link the SINTBL section in your linker .cmd file. The linker will stuff SINTBL in the first memory it can find in your linker .cmd file MEMORY section where it fits. That is the memory you are calling 'progRAM'. You should be getting a linker warning about this unless you've deliberately unchecked the -w (-warn) linker option in the project options. -w is specified by default for all new CCS projects.
- David
Dear David,
I have resolved, I have declared
.sect "SINTBL" : > FLASHA, PAGE = 0
in a F2806x_FLASH_MY_project_name.CMD (my linker file, is it right?)
and now my DSP works correctly in stand alone boot mode.
Thanks!!!!! thanks!!!!! Thanks!!!!! :-)
P.S. You have been very exhaustive, and your suggested are very precious.