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TMS320F28335 PWM duty cycle variation

Hi @ all,

I want to use the PWM registers to generate three signals (see figure).  I already get EPWM1 and EPWM2. Im having trouble with EPWM3. The EPW3 should have a

period of 20us. The duty cycle of EPWM3 need to vary every 100us as in figure, during time T1 (high output of EPWM1), duty cycle is D1 and during time T2 (high output of EPWM2) duty cycle is D2. I failed to synchronize the three signals.

I need some specific advice and code to solve this issue.


 


Best regards,

Alex

  • Alex,

    I assume that you can create PWM3's waveform correctly and that the main problem is getting PWM3's duty cycle to update at the correct time. 

    What I would recommend is creating an interrupt several cycles prior to the moment that you want the duty cycle to update.

    For example, if PWM1 is configured to have a PRD of 15000 and configured in up-count mode, I would generate an interrupt at  around 14000 using PWM1's CMPA or CMPB events (assuming they are unused).

    In the interrupt, I'd then update the duty cycle.  Make sure PWM3's set to update via shadow-mode so that the update won't happen before you want it to. 

    If the problem is synchronization, I'd recommend looking at the Epwm User Guide for your device and then particularly look at the application-specific PWM configuration examples section.  This should help to give you some ideas.


    Thank you,
    Brett

  • Hi Brett , thank you very much for the reply. I am not familiar with using c2000, but I did follow some application examples. 

    Here is how I configure PWM3. The interrupt you mentioned in the reply should change the value of "RATE_C". Can you give me a specific code example of generating interrupt based on PWM1's CMPA?

    void InitEPwm3Example(void)
    {


    // Setup TBCLK
    EPwm3Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; 
    EPwm3Regs.TBPRD = 750; // Set period 10us
    EPwm3Regs.TBCTL.bit.PHSEN = TB_DISABLE; // Disable phase loading
    EPwm3Regs.TBPHS.half.TBPHS = 0x0000; // Phase is 0
    EPwm3Regs.TBCTR = 0x0000; // Clear counter
    EPwm3Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1; // Clock ratio to SYSCLKOUT
    EPwm3Regs.TBCTL.bit.CLKDIV = TB_DIV1;

    // Setup shadow register load on ZERO
    EPwm3Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
    EPwm3Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
    EPwm3Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
    EPwm3Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;

    // Set Compare values
    EPwm3Regs.CMPA.half.CMPA = RATE_C; // Set compare value

    // Set Actions
    EPwm3Regs.AQCTLA.bit.CAU = AQ_SET; // Set PWM3A on event B, up count
    EPwm3Regs.AQCTLA.bit.CBU = AQ_CLEAR; // Clear PWM3A on event B, up count

    EPwm3Regs.AQCTLB.bit.ZRO = AQ_TOGGLE; // Toggle EPWM3B on Zero

    // Interrupt where we will change the Compare Values
    EPwm3Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO; // Select INT on Zero event
    EPwm3Regs.ETSEL.bit.INTEN = 1; // Enable INT
    EPwm3Regs.ETPS.bit.INTPRD = ET_3RD; // Generate INT on 3rd event


    // Start the cout at 0
    epwm3_info.EPwmTimerIntCount = 0;
    epwm3_info.EPwmRegHandle = &EPwm3Regs;

    }

  • Alex,

    I would recommend taking a look at the INTSEL bit within the ETSEL register.  This should allow you to change what PWM event generates an interrupt.

    This register is documented within the EPWM User's Guide for you device.  For the F28335, it is here:
    http://www.ti.com/lit/sprug04


    Thank you,
    Brett