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Multi-channel PWM Generation With Phase Control

Hello,

I need a multi-channel PWM generation with phase control (equal the example in the eCAP Reference Guide) with eCAP1, eCAP2 and eCAP4, cause i'm using the others PWM's and eCAP's channels. I've been trying to do this but the module eCAP4 is still in phase with eCAP1, regardless of the applied phase. Can anyone help me? 

I'm using the TMS320x28335.

Thanks.

  • Hi,

     its just a guess but have you set your pwm EPWMxSYNCO for Example:

     EPwm1Regs.TBCTL.bit.SYNCOSEL = TB_CTR_ZERO; // Sync down-stream module 

    because the Sync line is connected to the eCAP Modules.(sprs439m.pdf page 68)

     

  • Hello,

    I tried that but it didn't work. For example, this is my code:

    // Initialize eCAP1/2/4

    // Setup APWM mode on CAP1, set period and compare registers
    ECap1Regs.ECCTL2.bit.CAP_APWM = EC_APWM_MODE; // Enable APWM mode
    ECap1Regs.CAP1 = CONT_PORTADORA; // Set Period value
    ECap1Regs.CAP2 = COMPARE_VALUE; // Set Compare value
    ECap1Regs.CTRPHS = PHASE_0; // Make eCAP1 reference phase = zero
    ECap1Regs.ECCTL2.bit.APWMPOL = EC_ACTV_HI; // Output is active high
    ECap1Regs.ECCTL2.bit.SYNCI_EN = EC_DISABLE; // No sync in for Master
    ECap1Regs.ECCTL2.bit.SYNCO_SEL = EC_CTR_PRD; // eCAP1 is Master
    ECap1Regs.ECCLR.all = 0x0FF; // Clear pending interrupts

    // Setup APWM mode on CAP2, set period and compare registers
    ECap2Regs.ECCTL2.bit.CAP_APWM = EC_APWM_MODE; // Enable APWM mode
    ECap2Regs.CAP1 = CONT_PORTADORA; // Set Period value
    ECap2Regs.CAP2 = COMPARE_VALUE; // Set Compare value
    ECap2Regs.CTRPHS = PHASE_120; // Phase offset = 3332 - (3332*120)/360 => 120 deg
    ECap2Regs.ECCTL2.bit.APWMPOL = EC_ACTV_HI; // Output is active high
    ECap2Regs.ECCTL2.bit.SYNCI_EN = EC_ENABLE; // Slaved off master
    ECap2Regs.ECCTL2.bit.SYNCO_SEL = EC_SYNCIN; // Sync "flow-through"
    ECap2Regs.ECCLR.all = 0x0FF; // Clear pending interrupts


    // Setup APWM mode on CAP4, set period and compare registers
    ECap4Regs.ECCTL2.bit.CAP_APWM = EC_APWM_MODE; // Enable APWM mode
    ECap4Regs.CAP1 = CONT_PORTADORA; // Set Period value
    ECap4Regs.CAP2 = COMPARE_VALUE; // Set Compare value
    ECap4Regs.CTRPHS = PHASE_240; // Phase offset = 3332-(3332*240)/360 => -120 deg
    ECap4Regs.ECCTL2.bit.APWMPOL = EC_ACTV_HI; // Output is active high
    ECap4Regs.ECCTL2.bit.SYNCI_EN = EC_ENABLE; // Slaved off master
    ECap4Regs.ECCTL2.bit.SYNCO_SEL = EC_SYNCO_DIS; // "Break the chain"
    ECap4Regs.ECCLR.all = 0x0FF; // Clear pending interrupts

    EALLOW;
    EPwm1Regs.TBCTL.bit.SYNCOSEL = TB_CTR_ZERO; // Sync down-stream module
    SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 1; // Start all the timers synced
    EDIS;

    // Start counters
    ECap1Regs.ECCTL2.bit.TSCTRSTOP = 1;
    ECap2Regs.ECCTL2.bit.TSCTRSTOP = 1;
    ECap4Regs.ECCTL2.bit.TSCTRSTOP = 1;

    Is there a way to avoid the synchronization of ePWM1SyncOut to eCAP4?

    Thanks

  • Can you setup a test to use CAP1,2 and 3 instead of 1,2, and 4?  If I remember correctly, the modules are sync-chained in their native order(1,2,3,4).  This would explain why CAP4 is not getting a sync - in pulse.  

    Another idea: What happens when you setup CAP3 to SYNCOUT = SYNCIN, additionally to your setup for CAP1,2 and4? 

     

     

     

  • Try setting eCAP1 to Sync in an not as Master so you sync both ecap1 and 4 to epwm1

    ECap1Regs.ECCTL2.bit.SYNCI_EN = EC_ENABLE;

    refer to sprufg4a.page 10

     

  • I did these things but it still doesn't work. When I try with eCAP1, eCAP2 and eCAP3 (like the example in the reference guide), it works well. It seems that eCAP1 and eCAP4  always receive the same synci_en signal, no matter what I configure. The problem is that I don't know if I'm doing something wrong or if it's not possible to do.

    Does anyone know?