Code execution durations were compared with GPIO's once running from:
(a) 0 wait-state internal RAM (b) internal Flash (c) 16 bits external RAM.
The platform is a 150MHz 28F335, with external RAM wait-states configured
Lead/Active/Trail: Rd: (1,2,0) Wr: (1,1,1) and the internal flash configured as recommended in data sheet: 5,5,8.
Initially the code was 100 nop's and the results were 820/1210/6560 nSec respectively.
With another more real code the results were 850/1460/4710 respectively.
So, ratios were anywhere between 1.000 : 1.476 : 6.890 to 1.000 : 1.718 : 5.541.
Few questions:
(1) As per data sheet sprs439 p. 182, Random access Flash time is 37 nSec,
so 100 nop's are expected at 3,700 nSec or half of it at best if reading 32 bits.
However, the performance (1,210nSec) were better than expected. How come?
(2) While internal Flash wait state are configured at (5,5,8) and external read at (1,2,0)
one might expect that external RAM would be quicker.
Can someone explain the differences between internal Flash vs external RAM wait states
and how they are comparable?
(3) Are the above results make sense or might indicate that something is wrongly configured?
Isaac
