warning: creating output section "coefffilt" without a SECTIONS specification

Hello!

1 It seems there are some problems at your .CMD - file (some sections are absent).

2 warning: entry-point symbol other than "_c_int00" specified: "code_start" (this is not a problem) http://processors.wiki.ti.com/index.php/C28x_Compiler_Error_and_Warning_Messages#Warning:_entry-point_symbol_other_than_.22_c_int00.22_specified:_.22code_start.22

Regards,

Igor

Hi Igor!

I deleted 28335_RAM_lnk.cmd from the linked file lists and added it again.

But problem is persisting. :(

regards,

Mahesh

Hi!

Could I please look at your .CMD? Maybe by chance you are using a CMD-file provided by default (by CCS) but not the file from the controlSUITE example project.

Regards,

Igor

Hi Igor

this is my cmd file:

/*
// TI File $Revision: /main/11 $
// Checkin $Date: April 15, 2009 09:57:28 $
//###########################################################################
//
// FILE: 28335_RAM_lnk.cmd
//
// TITLE: Linker Command File For 28335 examples that run out of RAM
//
// This ONLY includes all SARAM blocks on the 28335 device.
// This does not include flash or OTP.
//
// Keep in mind that L0 and L1 are protected by the code
// security module.
//
// What this means is in most cases you will want to move to
// another memory map file which has more memory defined.
//
//###########################################################################
// $TI Release: $
// $Release Date: $
//###########################################################################
*/

/* ======================================================
// For Code Composer Studio V2.2 and later
// ---------------------------------------
// In addition to this memory linker command file,
// add the header linker command file directly to the project.
// The header linker command file is required to link the
// peripheral structures to the proper locations within
// the memory map.
//
// The header linker files are found in <base>\DSP2833x_Headers\cmd
//
// For BIOS applications add: DSP2833x_Headers_BIOS.cmd
// For nonBIOS applications add: DSP2833x_Headers_nonBIOS.cmd
========================================================= */

/* ======================================================
// For Code Composer Studio prior to V2.2
// --------------------------------------
// 1) Use one of the following -l statements to include the
// header linker command file in the project. The header linker
// file is required to link the peripheral structures to the proper
// locations within the memory map */

/* Uncomment this line to include file only for non-BIOS applications */
/* -l DSP2833x_Headers_nonBIOS.cmd */

/* Uncomment this line to include file only for BIOS applications */
/* -l DSP2833x_Headers_BIOS.cmd */

/* 2) In your project add the path to <base>\DSP2833x_headers\cmd to the
library search path under project->build options, linker tab,
library search path (-i).
/*========================================================= */

/* Define the memory block start/length for the F28335
PAGE 0 will be used to organize program sections
PAGE 1 will be used to organize data sections

Notes:
Memory blocks on F28335 are uniform (ie same
physical memory) in both PAGE 0 and PAGE 1.
That is the same memory region should not be
defined for both PAGE 0 and PAGE 1.
Doing so will result in corruption of program
and/or data.

L0/L1/L2 and L3 memory blocks are mirrored - that is
they can be accessed in high memory or low memory.
For simplicity only one instance is used in this
linker file.

Contiguous SARAM memory blocks can be combined
if required to create a larger memory block.
*/

MEMORY
{
PAGE 0 :
/* BEGIN is used for the "boot to SARAM" bootloader mode */

BEGIN : origin = 0x000000, length = 0x000002 /* Boot to M0 will go here */
RAMM0 : origin = 0x000050, length = 0x0003B0
RAML0 : origin = 0x008000, length = 0x001000
RAML1 : origin = 0x009000, length = 0x001000
RAML2 : origin = 0x00A000, length = 0x001000
RAML3 : origin = 0x00B000, length = 0x001000
ZONE7A : origin = 0x200000, length = 0x00FC00 /* XINTF zone 7 - program space */
CSM_RSVD : origin = 0x33FF80, length = 0x000076 /* Part of FLASHA. Program with all 0x0000 when CSM is in use. */
CSM_PWL : origin = 0x33FFF8, length = 0x000008 /* Part of FLASHA. CSM password locations in FLASHA */
ADC_CAL : origin = 0x380080, length = 0x000009
RESET : origin = 0x3FFFC0, length = 0x000002
IQTABLES : origin = 0x3FE000, length = 0x000b50
IQTABLES2 : origin = 0x3FEB50, length = 0x00008c
FPUTABLES : origin = 0x3FEBDC, length = 0x0006A0
BOOTROM : origin = 0x3FF27C, length = 0x000D44

PAGE 1 :
/* BOOT_RSVD is used by the boot ROM for stack. */
/* This section is only reserved to keep the BOOT ROM from */
/* corrupting this area during the debug process */

BOOT_RSVD : origin = 0x000002, length = 0x00004E /* Part of M0, BOOT rom will use this for stack */
RAMM1 : origin = 0x000400, length = 0x000400 /* on-chip RAM block M1 */
RAML4 : origin = 0x00C000, length = 0x001000
RAML5 : origin = 0x00D000, length = 0x001000
RAML6 : origin = 0x00E000, length = 0x001000
RAML7 : origin = 0x00F000, length = 0x001000
ZONE7B : origin = 0x20FC00, length = 0x000400 /* XINTF zone 7 - data space */
}

SECTIONS
{
/* Setup for "boot to SARAM" mode:
The codestart section (found in DSP28_CodeStartBranch.asm)
re-directs execution to the start of user code. */
codestart : > BEGIN, PAGE = 0
ramfuncs : > RAML0, PAGE = 0
.text : > RAML1, PAGE = 0
.cinit : > RAML0, PAGE = 0
.pinit : > RAML0, PAGE = 0
.switch : > RAML0, PAGE = 0

.stack : > RAMM1, PAGE = 1
.ebss : > RAML4, PAGE = 1
.econst : > RAML5, PAGE = 1
.esysmem : > RAMM1, PAGE = 1

IQmath : > RAML1, PAGE = 0
IQmathTables : > IQTABLES, PAGE = 0, TYPE = NOLOAD

/* Uncomment the section below if calling the IQNexp() or IQexp()
functions from the IQMath.lib library in order to utilize the
relevant IQ Math table in Boot ROM (This saves space and Boot ROM
is 1 wait-state). If this section is not uncommented, IQmathTables2
will be loaded into other memory (SARAM, Flash, etc.) and will take
up space, but 0 wait-state is possible.
*/
/*
IQmathTables2 : > IQTABLES2, PAGE = 0, TYPE = NOLOAD
{

IQmath.lib<IQNexpTable.obj> (IQmathTablesRam)

}
*/

FPUmathTables : > FPUTABLES, PAGE = 0, TYPE = NOLOAD

DMARAML4 : > RAML4, PAGE = 1
DMARAML5 : > RAML5, PAGE = 1
DMARAML6 : > RAML6, PAGE = 1
DMARAML7 : > RAML7, PAGE = 1

ZONE7DATA : > ZONE7B, PAGE = 1

.reset : > RESET, PAGE = 0, TYPE = DSECT /* not used */
csm_rsvd : > CSM_RSVD PAGE = 0, TYPE = DSECT /* not used for SARAM examples */
csmpasswds : > CSM_PWL PAGE = 0, TYPE = DSECT /* not used for SARAM examples */

/* Allocate ADC_cal function (pre-programmed by factory into TI reserved memory) */
.adc_cal : load = ADC_CAL, PAGE = 0, TYPE = NOLOAD

}

/*
//===========================================================================
// End of file.
//===========================================================================
*/

regards

Mahesh

Hi

I'm using default CMD..not any specific one... no cmd file was available at control suite fot this project... 

from where i can get that?

regards

Mahesh

Hi!

This file doesn't include all your needed sections. Try 

/*

// TI File $Revision: /main/2 $

// Checkin $Date: Thu Jan  6 15:14:02 2011 $

//###########################################################################

//

// FILE:    28335_RAM_lnk.cmd

//

// TITLE:   Linker Command File For 28335 examples that run out of RAM

//

//          This ONLY includes all SARAM blocks on the 28335 device.

//          This does not include flash or OTP.

//

//          Keep in mind that L0 and L1 are protected by the code

//          security module.

//

//          What this means is in most cases you will want to move to

//          another memory map file which has more memory defined.

//

//###########################################################################

// $TI Release: C28x Fixed Point Library v1.01 $

// $Release Date: January 11,2011 $

//###########################################################################

*/



/* ======================================================

// For Code Composer Studio V2.2 and later

// ---------------------------------------

// In addition to this memory linker command file,

// add the header linker command file directly to the project.

// The header linker command file is required to link the

// peripheral structures to the proper locations within

// the memory map.

//

// The header linker files are found in <base>\DSP2833x_Headers\cmd

//

// For BIOS applications add:      DSP2833x_Headers_BIOS.cmd

// For nonBIOS applications add:   DSP2833x_Headers_nonBIOS.cmd

========================================================= */



/* ======================================================

// For Code Composer Studio prior to V2.2

// --------------------------------------

// 1) Use one of the following -l statements to include the

// header linker command file in the project. The header linker

// file is required to link the peripheral structures to the proper

// locations within the memory map                                    */



/* Uncomment this line to include file only for non-BIOS applications */

/* -l DSP2833x_Headers_nonBIOS.cmd */



/* Uncomment this line to include file only for BIOS applications */

/* -l DSP2833x_Headers_BIOS.cmd */



/* 2) In your project add the path to <base>\DSP2833x_headers\cmd to the

   library search path under project->build options, linker tab,

   library search path (-i).

/*========================================================= */



/* Define the memory block start/length for the F28335

   PAGE 0 will be used to organize program sections

   PAGE 1 will be used to organize data sections



   Notes:

         Memory blocks on F28335 are uniform (ie same

         physical memory) in both PAGE 0 and PAGE 1.

         That is the same memory region should not be

         defined for both PAGE 0 and PAGE 1.

         Doing so will result in corruption of program

         and/or data.



         L0/L1/L2 and L3 memory blocks are mirrored - that is

         they can be accessed in high memory or low memory.

         For simplicity only one instance is used in this

         linker file.



         Contiguous SARAM memory blocks can be combined

         if required to create a larger memory block.

*/





MEMORY

{

PAGE 0 :

   /* BEGIN is used for the "boot to SARAM" bootloader mode      */



   BEGIN      : origin = 0x000000, length = 0x000002     /* Boot to M0 will go here                      */

   RAMM0      : origin = 0x000050, length = 0x0003B0

   RAML0      : origin = 0x008000, length = 0x001000

   RAML1      : origin = 0x009000, length = 0x001000

   RAML2      : origin = 0x00A000, length = 0x001000

   RAML3      : origin = 0x00B000, length = 0x001000

   ZONE7A     : origin = 0x200000, length = 0x00FC00    /* XINTF zone 7 - program space */

   CSM_RSVD   : origin = 0x33FF80, length = 0x000076     /* Part of FLASHA.  Program with all 0x0000 when CSM is in use. */

   CSM_PWL    : origin = 0x33FFF8, length = 0x000008     /* Part of FLASHA.  CSM password locations in FLASHA            */

   ADC_CAL    : origin = 0x380080, length = 0x000009

   RESET      : origin = 0x3FFFC0, length = 0x000002

   IQTABLES   : origin = 0x3FE000, length = 0x000b50

   IQTABLES2  : origin = 0x3FEB50, length = 0x00008c

   FPUTABLES  : origin = 0x3FEBDC, length = 0x0006A0

   BOOTROM    : origin = 0x3FF27C, length = 0x000D44





PAGE 1 :

   /* BOOT_RSVD is used by the boot ROM for stack.               */

   /* This section is only reserved to keep the BOOT ROM from    */

   /* corrupting this area during the debug process              */



   BOOT_RSVD  : origin = 0x000002, length = 0x00004E     /* Part of M0, BOOT rom will use this for stack */

   RAMM1      : origin = 0x000400, length = 0x000400     /* on-chip RAM block M1 */

   RAML4      : origin = 0x00C000, length = 0x001000

   RAML5      : origin = 0x00D000, length = 0x001000

   RAML6      : origin = 0x00E000, length = 0x001000

   RAML7      : origin = 0x00F000, length = 0x001000

   ZONE7B     : origin = 0x20FC00, length = 0x000400     /* XINTF zone 7 - data space */

}





SECTIONS

{

   /* Setup for "boot to SARAM" mode:

      The codestart section (found in DSP28_CodeStartBranch.asm)

      re-directs execution to the start of user code.  */

   codestart        : > BEGIN,     PAGE = 0

   ramfuncs         : > RAML0,     PAGE = 0

   .text            : > RAML1,     PAGE = 0

   .cinit           : > RAML0,     PAGE = 0

   .pinit           : > RAML0,     PAGE = 0

   .switch          : > RAML0,     PAGE = 0



   .stack           : > RAMM1,     PAGE = 1

   .ebss            : > RAML4,     PAGE = 1

   .econst          : > RAML5,     PAGE = 1

   .esysmem         : > RAMM1,     PAGE = 1
         
   SINTBL			: > RAMM1,     PAGE = 1

   firldb   align(0x100)> RAML1	   PAGE = 0
   firfilt			: >	RAML1	   PAGE = 0  
   coefffilt align(0x100)>RAML2    PAGE = 0
   sigIn			: > RAML4 	   PAGE = 1  
   sigOut	  		: >	RAML2	   PAGE = 0



   IQmath           : > RAML1,     PAGE = 0

   IQmathTables     : > IQTABLES,  PAGE = 0, TYPE = NOLOAD



   /* Uncomment the section below if calling the IQNexp() or IQexp()

      functions from the IQMath.lib library in order to utilize the

      relevant IQ Math table in Boot ROM (This saves space and Boot ROM

      is 1 wait-state). If this section is not uncommented, IQmathTables2

      will be loaded into other memory (SARAM, Flash, etc.) and will take

      up space, but 0 wait-state is possible.

   */

   /*

   IQmathTables2    : > IQTABLES2, PAGE = 0, TYPE = NOLOAD

   {



              IQmath.lib<IQNexpTable.obj> (IQmathTablesRam)



   }

   */



   FPUmathTables    : > FPUTABLES, PAGE = 0, TYPE = NOLOAD



   DMARAML4         : > RAML4,     PAGE = 1

   DMARAML5         : > RAML5,     PAGE = 1

   DMARAML6         : > RAML6,     PAGE = 1

   DMARAML7         : > RAML7,     PAGE = 1



   ZONE7DATA        : > ZONE7B,    PAGE = 1



   .reset           : > RESET,     PAGE = 0, TYPE = DSECT /* not used                    */

   csm_rsvd         : > CSM_RSVD   PAGE = 0, TYPE = DSECT /* not used for SARAM examples */

   csmpasswds       : > CSM_PWL    PAGE = 0, TYPE = DSECT /* not used for SARAM examples */



   /* Allocate ADC_cal function (pre-programmed by factory into TI reserved memory) */

   .adc_cal     : load = ADC_CAL,   PAGE = 0, TYPE = NOLOAD



}



/*

//===========================================================================

// End of file.

//===========================================================================

*/

Regards,

Igor

Hi Igor,

I tried with that file. But still error is same.

regards

Mahesh

Hi Mahesh,

It could be that the .lib that came with the distribution might be corrupted. Import the library project into CCS and rebuild it and then try your code with the new .lib.

Hi Mahesh!

What is the exact name (or better path) of your controlSuite example project?

Regards,

Igor

Hi Igor

Example project name is: 2833x_FIR

c file name: Test_FPU_FIR.c

C:\ti\controlSUITE\libs\dsp\FPU\v131\examples\2833x_FIR

regards

Mahesh

Hi Igor!

now the error has been reduced!

But still some error is there:

undefined first referenced
symbol in file
--------- ----------------
_FIR_FP_calc ./fir.obj
_FIR_FP_init ./fir.obj

error: unresolved symbols remain
warning: entry-point symbol other than "_c_int00" specified: "code_start"
error: errors encountered during linking; "firpgm.out" not built

>> Compilation failure
C:\Program Files (x86)\Texas Instruments\ccsv4\utils\gmake\gmake: *** [firpgm.out] Error 1
C:\Program Files (x86)\Texas Instruments\ccsv4\utils\gmake\gmake: Target `all' not remade because of errors.
Build complete for project firpgm

please help

regards

Mahesh

Hi Vishal,

Can you please tell me how to built it with new .lib?

thanks n regards

Mahesh