I am trying to find a microcontroller to implement a pseudo TDMA transceiver in. The pTDMA is a high speed control network I designed 25 years ago. Back then I used programmable logic to pull it off.
The bits:
bit rate: 50MHz
bits/packet: 10
packets/frame: 256
sync: b0 of each packet is always 1. All of packet 255 is always 0.
Tx and Rx bit streams never stop. Tx and Rx may or may not be in sync.
I have been looking into the F28M35X and similar chips. Using the SSI in continuous mode looks like it might work with some fanageling. I can see how the Tx side of things could work. The Rx side would be a bit trickier though, especially with syncing. Tx DMA would repeatedly cycle through 256 10-bit ram locations. Rx DMA would do the same, but would use different ram bank. Not sure how I would sync with data stream.
Am I dreaming here? Is there another chip that would be better suited for this?
Thank you.
Bernie