Hello,
I`m quite new in programming dual core devices and I want to ask you for some clarifications regarding the clock for the control core C28 for the F28M35H52C1 device;
Is it able to work without any enabling from the master M3 core? if yes can you direct me to the registers that must be set;
I`ve tried to do an example with two blinking leds where one is controled by M3 and the other one by C28.
When M3 is setting the clock via PLL everything is working;
If I`m reseting the M3 core and start the C28 with the get starting code on it, none of the leds is blinking anymore.
If I`m using the function SysCtlC28Disable (); inside the code for M3 the leds aren`t blinking and when I`m trying to stop the C28 core I receive the error with "The system may run in low power mode";
also in the Concerto tehnical manual you can find written that:
The master subsystem is responsible for clocking control and can read/write to clocking configuration
registers by default on reset
The master subsystem can also choose to switch off the clock for the control subsystem by setting the
C28CLKINDIS (bit 0) of the CCLKOFF register. The clock to control subsystem is enabled by default on
power-up and after an XRSn.
I have attached to you a picture from one of the ti workshops, maybe you can explain on it how does the clocking mechanism is working.
Thank you in advance,
Monica
