• State Resolved
  • Locked Locked
  • Replies 8 replies
  • Subscribers 84 subscribers
  • Views 777 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

EPWM state on reset/program load

Shivkumar Iyer1
Prodigy 40 points

Other Parts Discussed in Thread: TMS320F28335

Hello,

I am using the Delfino experimenter kit with TMS320F28335 processor to control a three phase 6-IGBT module. So far I wrote a code that configures the ADC to take as inputs a three-phase grid voltage and locks onto the phase angle. After that I am trying to generate PWM signals for the IGBT module based on this phase angle.

The code runs OK with phase locking and PWM generation and also dead band generation. The only problem is that when I load the program (ie. the .out file), at the moment all the EPWM signals are high. When I execute the code, the correct PWM signals are generated. But if this is the case, I would have to switch off the dc until I execute the code. I searched the forum and one post suggested exactly that.

Is there any other way around this? I would rather not have to switch off the dc voltage every time. The only other thing I can think of is in the next generation of interface PCB that I design I'll put a NOT gate to make sure that EPWM signals are low and invert the logic in the code to get the same pulses when the code executes.

Thanks in advance.

Best Regards,

Shiv

  • 0
    Guru 192875 points

    Hi Shiv,

    I faced the same problem too.... but it was random. Sometimes it was high and sometimes low. So no way to use a NOT gate. So please check yours too thoroughly; whether its high always or it changes!

    Truly speaking it didn't effect my system so just ignored it.  I hope we get a solution soon.

    Regards,

    Gautam

  • 0 in reply to Gautam Iyer
    Prodigy 40 points

    Hi Gautam,

    Thanks for the response. Even when I just connect the kit to the computer through the USB, the signals go high.

    Some points after reading the GPIO user guide again:

    1. All GPIO pins are configured as input on reset.

    2. If GPIO is configured as EPWM, the internal pull-up is disabled. But from point 1, this does not happen immediately after reset as GPIO0-11 are inputs.

    3. From the GPxDAT registers, all the bits are marked as R/W-x. this means that the state of the register bits is unknown after reset and depends on the level of the pins. So are the levels of the pins after reset random or are they high?

    Thanks and regards,

    Shiv

  • 0 in reply to Shivkumar Iyer1
    TI__Guru* 93800 points

    Shivkumar Iyer1 said:
    1. All GPIO pins are configured as input on reset.

    Correct.

    Shivkumar Iyer1 said:
    2. If GPIO is configured as EPWM, the internal pull-up is disabled. But from point 1, this does not happen immediately after reset as GPIO0-11 are inputs.

    Not sure of the reasoning here.  They are both inputs and the internal pull-up is disabled.  What this means is they will all be high impedance and nothing internal to the silicon will be driving them one way or the other.

    Shivkumar Iyer1 said:
    3. From the GPxDAT registers, all the bits are marked as R/W-x. this means that the state of the register bits is unknown after reset and depends on the level of the pins. So are the levels of the pins after reset random or are they high?

    This is correct.  Since they are high impedance with no pull-up or pull-down they will float.  Where they float to is unknown and will be influenced by what is external to the device - the device itself will not drive them in one direction or the other.  

  • 0 in reply to Lori Heustess
    Prodigy 40 points

    Thank you for the response. So the internal pull-up is disabled for GPIO 0-11 irrespective of them being configured as EPWM or I/O.

    I have tried connecting and disconnecting the device and the EPWM pins are always high. The only solution I can think of is to use one of the GPIO pins where pull-up is enabled by default and use those as a kind of gate signal to release the PWM pulses. I suppose an active low logic would do the job. So I clear the GPIO pin in software to release the pulses or else even if the EPWM pins are high they won't be released to the devices.

    Thanks for the responses.

    Regards,

    Shiv

  • 0 in reply to Lori Heustess
    Guru 192875 points

    Thanks Lori for a brief info.

    Regards,

    Gautam

  • 0 in reply to Gautam Iyer
    TI__Genius 10820 points

    Hi Gautam, Shiv,

    As Lori mentioned in a previous post, these pins will be inputs at reset and in a high impedance state. One solution to ensure that outputs will be held low on reset is to use external pull-down resistors. A second solution, if you are using a gate driver that has an enable/disable pin, is to make sure that this driver is disabled at reset.

    Additionally, as stated in the device datasheet, make sure that the VDD pins are powered up prior to or simultaneously with the VDDIO pins ensuring that VDD pins have reached 0.7 V before VDDIO pins reach 0.7 V. This is to avoid glitches on the I/O pins during power up, which may be the reason for the behavior seen by Gautam.

    - Hrishi

  • 0 in reply to Hrishi Nene
    Prodigy 40 points

    Hi Hirshi,

    Thanks for the post.

    My question has been answered already but I thought I would post the exact solution I had in mind. I use level shifters to shift the 3.3V signals to 5V signals to my IGBT module. The level shifters are luckily low enable. So my plan is to use another GPIO pin (maybe GPIO 48) to enable to level shifters. So in the main code, I'll clear the GPIO pin to enable my gate pulses. This GPIO will be pulled up at power on/reset so the gate pulses will be disabled initially until the code runs.

    Is there any chance this GPIO pin will be low on power on even for maybe a few milliseconds due to some power fluctuation? Thats my only last concern because if that happens, the dc bus would be shorted for that small amount of time.

    Thanks and regards,

    Shiv

  • 0 in reply to Hrishi Nene
    Guru 192875 points

    Hi Hrishi,

    "external pull-down resistors" solves my issue. Thanks!

    Regards,

    Gautam