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TMS320F2806x Flash Wait State

martin izaak
Prodigy 210 points

Other Parts Discussed in Thread: TMS320F28069, CONTROLSUITE

Hi forum,

I need some help with the TMS320F28069, please.

During building a own project based on one from the examples I am a little bit confused about the flash wait states.

In the function InitFlash of the example code the wait states are as followed

-------- snip --------
//Set the Paged Waitstate for the Flash
FlashRegs.FBANKWAIT.bit.PAGEWAIT = 2;
//Set the Random Waitstate for the Flash
FlashRegs.FBANKWAIT.bit.RANDWAIT = 2;
//Set the Waitstate for the OTP
FlashRegs.FOTPWAIT.bit.OTPWAIT = 2;
-------- snap --------

But the data sheet says at 90Mhz SYSCLKOUT it should be 3 3 5 (page 156 of SPRS698D)

I checked the SYSCLKOUT freq, it is 90Mhz. So is there a kind of "overclocking"?

By the way, the examples uses the internal clock generation, the external crystal of the control card is not used. If i switch to the external one I have to take care about the PLL, because now we have 20Mhz "base freq". is this correct?

Thank you for your answers
martin

  • 0
    Guru 20525 points

    Hello!

    I think the best way to follow to comments in API of MCU.

    ti\controlSUITE\device_support\f2806x\v136\F2806x_common\source\F2806x_SysCtrl.c:

    // CAUTION
    //Minimum waitstates required for the flash operating
    //at a given CPU rate must be characterized by TI.
    //Refer to the datasheet for the latest information.!!!

    //Set the Paged Waitstate for the Flash
    FlashRegs.FBANKWAIT.bit.PAGEWAIT = 2;

    //Set the Random Waitstate for the Flash
    FlashRegs.FBANKWAIT.bit.RANDWAIT = 2;

    //Set the Waitstate for the OTP
    FlashRegs.FOTPWAIT.bit.OTPWAIT = 2;

    Thus you need 3 3 5.

    Regards,

    Igor

  • 0
    TI__Guru 61235 points

    Martin,

    At 90 MHz, the flash wait-states should be set to 3/3/5 as you cited from SPRS698D (rule of thumb: datasheet always has priority over believing other documentation or example code!).

    I believe the example you are looking at is from ControlSuite v1.36, file F2806x_SysCtrl.c.  There, the wait-states are set to 2/2/2 as you said.  I understand why the first two 2's (i.e., RANDWAIT=PAGEWAIT=2).  This is because the example was originally written for 80 MHz operation which has 2/2/4 wait-states.  Clearly, the OTPWAIT=2 is wrong in the code however.  It should be 4.  I will report this to the C2000 team.

    Regards,

    David

  • 0 in reply to David M. Alter
    Prodigy 210 points

    thank you for your fast response.

    excuse my silly question:
    at 90Mhz I have a wait time of 33ns
    at 80Mhz I have a wait time of 25ns

    does this mean that i have a slower flash at 90Mhz SYSCLK or is this time compensate by the pipe.
    My question points to the use of the flash for middle prior functions.

    regards

    martin

  • 0 in reply to martin izaak
    TI__Guru 61235 points

    Martin,

    The flash access speed is independent of the processor frequency.  For example, random access is ta(fr)=36 ns.  This is in the datasheet SPRS698D, p.155.

    But you are making a very good observation when you say the actual wait at 90 MHz (as configured) is longer than at 80 MHz.  What is going on here is that you can only apply wait states in integer increments.  At 80 MHz, the wait time is right on the edge of needed another wait-state.  When you go to 90 MHz, the wait time for the same setting of RANDWAIT=2 is too small (e.g., 22.2 ns).  So, you need to bump the wait up by a full integer value making it 33.3 ns.  There is a lot of excess wait at 90 MHz.

    There is an EE Times article here that discusses this phenomenon:

    http://www.eetimes.com/document.asp?doc_id=1153962

    Regards,

    David

  • 0 in reply to David M. Alter
    Prodigy 210 points

    David,

    that is what I thought.

    Thank you very much for your fast response. that is a good example of how a support from a big manufacturer for a little user  can be.

    Thanks a lot again

    Martin