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2 vs. 3 current sensors / OPA for InstaSPIN

Other Parts Discussed in Thread: DRV8301

Hello, i was wondering why the design has 3 external sense OPAMPS, since the DRV8301 chip has already has 2 on board.

Is there something we need to take in to consideration with leaving the 2 external OPAMPS out of the design.

  • Hos,

    We added the 3 external opamps because:

    • we wanted to allow a best 2 of 3 current sensing approach to enable 100% trapezoidal over-modulation. this increases the available DC bus / duty cycle for significantly higher speeds. If you only use 2 current sensors you will have to limit yourself to a maximum SVPWM modulation.
    • it is usually best to balance these sense circuits, so we used three external. however, we have a new inverter board we'll release in a couple months using DRV8301 and in this case we made the trade-off and are using the 2 internal PGAs on DRV8301 and a single external OPA for the third phase.  This is working quite well so far.

     

  • Hi Chris,

    I can't understand what you mean "Best 2 of 3" ?

    what is the difference if using 2 or current sensors ?

    anyhow they always need to sum to zero, so from 2 you can calculate the third...

  • "anyhow they always need to sum to zero, so from 2 you can calculate the third..."

    AhHa! That's the gist.  Yes, your A+B+C=0, but can you ALWAYS get measurements of A and B?  Think about where and when you are measuring A and B in a bottom leg shunt system.

    I'll let you ponder on that one for a bit... :)

     

  • Hi Chris,

    Yeah, I see your point.. but if you're using LEMs (like I usually do), placed on the motor phases, then you don't need to worry about which FET is conducting... and then they must sum to zero (which can also be argued further...)

  • mojo,

    if you are using LEMs then you don't have to worry about sampling windows through the shunt. You can use 2 phases (select this in your user.h) and you can still go into ovemodulation.

     

  • Hi Chris,

    you said that you need to take into account which lower FET is conducting when taking the current measurement.

    however, I looked into the code and could not see such a decision making.

    could you please refer me to the code section where the decision about which phase current to use is being conducted ?

    by the way, something from older versions - you're still configuring TZ6 in the PWM module, however it is not defined in the GPIOs (I'm using the latest ver 09). the other two-TZ2,3 are configured ok...

    thanks

  • Mojo,

    We are using center aligned PWMs with ADC sampling triggered on the Timer resetting to 0.

    Center aligned means that the duty cycle (high side ON time) is centered around the period (top of timer which is counting up-down) meaning the high side is OFF around the timer = 0.  The low side is then ON around the timer = 0.

    So if you kick off an ADC start of conversion at timer = 0, you can sample in the middle of that low side FET ON time and, as long as the ON time is long enough, you can get a valid sample.

    Make sense?

    Let me check on the TZ6, thanks for notifying.

     

  • quick white board example

     

  • now why is that showing upside down? It shows rightside up on every other application I open it with on my PC.  Strange.

     

  • Regardint the TZ.

    The trip zones are set per board per target in the drv.c file.  For DRV8301 and F2806x this is the set-up:

      // Configure Trip Mechanism for the Motor control software
      // -Cycle by cycle trip on CPU halt
      // -One shot fault trip zone
      // These trips need to be repeated for EPWM1 ,2 & 3
      for(cnt=0;cnt<3;cnt++)
        {
          PWM_enableTripZoneSrc(obj->pwmHandle[cnt],PWM_TripZoneSrc_CycleByCycle_TZ6_NOT);

          PWM_enableTripZoneSrc(obj->pwmHandle[cnt],PWM_TripZoneSrc_CycleByCycle_TZ3_NOT);

          PWM_enableTripZoneSrc(obj->pwmHandle[cnt],PWM_TripZoneSrc_CycleByCycle_TZ2_NOT);

          // What do we want the OST/CBC events to do?
          // TZA events can force EPWMxA
          // TZB events can force EPWMxB

          PWM_setTripZoneState_TZA(obj->pwmHandle[cnt],PWM_TripZoneState_EPWM_Low);
          PWM_setTripZoneState_TZB(obj->pwmHandle[cnt],PWM_TripZoneState_EPWM_Low);

          // Clear any spurious fault
          PWM_clearOneShotTrip(obj->pwmHandle[cnt]);
        }

    and elswhere in the drv.c file we set-up the GPIO pins which are TZ2 and TZ3

      // OCTWn
      GPIO_setMode(obj->gpioHandle,GPIO_Number_13,GPIO_13_Mode_TZ2_NOT);

      // FAULTn
      GPIO_setMode(obj->gpioHandle,GPIO_Number_14,GPIO_14_Mode_TZ3_NOT);

     

    TZ6 (as are TZ4 and TZ5) is an internal Trip Zone which does not require a GPIO set-up.