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3 Phase PFC with f28035

Other Parts Discussed in Thread: TMDSDOCK28035, OPA350, OPA348

Hello TI Team,

we are implementing 3 phase 10kW PFC with code that you mentioned before as a post

http://e2e.ti.com/support/microcontrollers/c2000/f/171/t/262867.aspx

also Mr. Yunus Karaborek (TI Turkey team member) supported us the same code and hardware schematics. we are running the code with tmdsdock28035 experimenter kit and we have nearly the same hardware structure for reading current and voltage samples. only changes are, we are using ACS709LLFTR-20BB-T (56mV/1Amp) current sense IC instead your custom design current transformer and also we are using TI opa348 instead TI opa350 for voltage sensing. All sensing offset voltages have been set to 1.65V as recommended (dc link offset is 0V). switching frequency and dead time have been set to 40 kHz and 2us respectively.

Our main problem occurs while input line currents are low. so that our low side PWM outputs have spaces periodically while line voltage goes to positive. also this makes 50hz audible noise on pfc inductors. you can see the oscilloscope view below. when we get higher line currents, empty pwm spaces disappears and it works fine.

voltage and current graphs are inverted.


yellow channel, high side gate signals with bootstrap. (we fixed it with isolated supply. now it works fine)

blue channel, low side gate signals. has spaces

pink one is R phase line voltage (inverted)

green one is R phase inductor current (inverted)

how can we fix pwm spaces on low side ?

also we can send you more information (technical data, project details etc) details via e-mail communication.

thanks for your kind help

Alper Goynusen

Hardware Designer / Msc.EE.

  • anyone does not have an idea?

  • Alper,

    I am not familiar with this specific project, but have notified some of our systems engineers of this post. 

    However, I do not believe we will be able to fully support this well externally.  I would recommend working through Yunus if possible.  He can then support you with our help.


    Thank you,
    Brett

  • Thank you Brett,

    We  are working through Yunus as well, also he recommended to discuss this problem at e2e forums. I hope your colleagues will find a solution and contact with us. we are looking forward to this.

    thanks

    Alper

  • Alper bey

     I will contact with you today. Thank you very much Brett.

    Best Regards

    Yunus

  • Alper

    I don't think the PWM waveform is abnormal. In your waveform, the low side PWM has a very small duty in the peak of the grid voltage. If the duty is less than the dead-time, the low side gate PWM will be always off.

    I think this issue is caused by the DC offset of the PI controller, when the signal sampling has a DC offset in a specified period(ie ,in line cycle), the PI controller will be saturated, and you can see the duty cycle can not be regulated in the saturated time.

    I sugguset that you should check your grid voltage and input current sensing, and check if the middle point(1.65V) sampling is correct or not. Try to reduce the offset of the current and voltage sampling. Besides, please try to ruduce the current loop PI's integral parameters, maybe you can remove the integral of the current PI. Finally, please reduce the effect of the feed forward of the grid voltage in the light load.

     

  • Thank You Mr. Xue,

    we have checked the middle point(1.65V) of sensed current and voltage feedbacks from watch window in CCS4 and they seem quite well around 1.65V So i think we should tune sampling and integral ratio as you have expressed.

    we will inform you about the result

    thanks 

    Alper

  • Hi Xue,

    I am also in study of the 3 phase pwm rectifier, and our company is going to design a 15kW converter for ozone generation with 3 phase APFC.

    I have read some books and papers for this, but a demo based on TI DSP must be a better start point.

    So could you pls send me the lastest version source code, which on my hand is 0083.ThreePhasePFC_Code.

    I can not find the hardware schematics online, pls also give me a link.

    Any other docs from TI about 3 phase APFC are helpful for me if possible.

    Thanks.

  • Hi Alper,

         Did you got success to solve your problem ?

         I am also trying design 1KW 3 phase PFC and having problem in circuit,

    In industries mostly Delta connection is available, so what is your input.

    3 phase deta or 3 phase star, for implementation do i need to make neutral available ?

    Ho you have tackled common mode noise issue because of input chocks ?

    Thank You

  • Hi Bhuvaneshwar,

    actually i wrote my own pfc and 2p2z code in 28235 dsc, so i didnt solved ti's code. My input was 3 phase star connection and i used same hardware for ti code and my code.

    in 3 phase 230V star connection line to line peak voltage is 560V so you can boost it to 800V.
    in delta 230V connections, line to line peak voltage can only be 325V, i think this voltage is insufficient to increase 800V properly. so you should choose 400V output dc link voltage.

    also in 110V 3ph star connection can be boosted up to 400V dc link, 110V 3ph delta connection can be boosted up to 250-300Vdc as well.

    you can simply calculate healthy and workable ratio with 800/560 division.

    if you want to connect neutral to the midpoint of output voltage(capacitors) you should suppose to write balance code, otherwise in unbalanced phase voltage conditions, some of unbalanced currents (according to unbalanced 3 phase voltages, for ex U:228V, V:225V and W:232V) returns from neutral and you can see this currents in no load condition clearly. so i didnt connect neutral, actually no need to neutral because in industry, %98 of three phase loads dont have neutral connection. in delta connection you cant have neutral as well.

    i havent implemented cm chokes yet.

    good luck.
  • Hi Alper,

    :) Thanks a lot Alper that is really useful information.

    Sorry but I am having some more queries.....
    In your case where have you connected Neutral point ?
    Is it connected to Common point of input capacitor ?
    Have you used Phase-Phase or Phase-Neutral voltage for PFC correction ?
    Which method is better Average current control or Clark Park control for PFC ?

    I am trying to do it with Clark-park PFC control & measuring Phase to Phase voltage and Chock input current,
    But as load Increases there is change in phase between all 3 current waveforms w.r.t voltage and I struggling to solve this issue.

    Tried to do average current control with TI sample code but its not working.
    Do you have any document online which will help in this development ?

    Thank You
  • you dont have to connect neutral to anywhere, you may connect them to the common point of input capacitor.
    i used phase to neutral voltage (star connected), you can use phase to phase connection but your dc link value should be lower, maybe you can choose 650V IGBT's in that case, lower VceSAT, lower switching losses. but R^2 and VceSAT losses will increase in same power.
    i used average current control method but you can use SVM(Park Clark) control if your ratio more than 800/560 value.

    TI sample code works with, i bought it and code worked normally. you should connect PWM and ADC's correctly and carefully.
    www.digikey.com/.../35492

    i build my code and controller by the help of v.21ic.com/.../TI_3phasePFCandAPFapplicationwithTIC2000MCU.pdf
    document, average current control transfer functions and theory is sufficient to achieve. also sample code uses the same approach. 2p2z controller is easier and more reliable than standart PI controller, also prefer to use IQmath lib.

    for inductor and other tricks you can follow ETH articles.
    https://www.pes.ee.ethz.ch/