This thread has been locked.
If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.
Hi,
Here's the info you're seeking:
3.7.1.1 Using the On-chip VREG
To utilize the on-chip VREG, the VREGENZ pin should be tied low and the appropriate recommended
operating voltage should be supplied to the VDDIO and VDDA pins. In this case, the VDD voltage needed by
the core logic will be generated by the VREG. Each VDD pin requires on the order of 1.2 μF (minimum)
capacitance for proper regulation of the VREG. These capacitors should be located as close as possible
to the VDD pins.
3.7.1.2 Disabling the On-chip VREG
To conserve power, it is also possible to disable the on-chip VREG and supply the core logic voltage to
the VDD pins with a more efficient external regulator. To enable this option, the VREGENZ pin must be tied
high.
Regards,
Gautam
thanks for reply.
I have set as follows now.
VREGENZ -> GND
VDD -> 1.2 μF capacitor to ground
However, it does not work properly due to noise.
When connecting a capacitor to VREGENZ, It works correctly.
And to eliminate noise, Is there a recommended value of the capacitor to be connected to the VREGENZ?
I'm sorry in poor English.
Hello FSSer,
To utilize the internal VREG, the VREGENZ pin needs to be tied directly to GND.
When you say "It works correctly by connecting a capacitor to VREGENZ", I am curious, are you referring to setup a or b below?
There should be no need to tie the VREGENZ pin to GND with a cap.
Can you scope your VREGENZ pin without the cap while your board is on?
Regards,
Adam
FSSer,
I have done some modeling of your circuit and am not sure there is any actual filtering happening.
The schematic:
The 10m resistors are for trace resistance and a signal was injected on the GND node.
The blue arrow points to the output from 10Hz to 10GHz and there is no attenuation.
I think the first step in fixing this issue is to find out the source of the noise on the GND and remove it. Then you should be able to tie VREGENZ directly to GND.
Regards,
Adam