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What is the maximum slew rate (rise time) on the TMS320F28035 GPIO?

Jason Work
Genius 10830 points
Other Parts Discussed in Thread: TMS320F28035

What is the maximum rise and fall time allowable for GPIO inputs on the TMS320F28035?  GPIO switching rise time and fall time are specified for GPIO output timing of the TMS320F28035, tr(GPIO) and tf(GPIO).  These are undefined for GPIO input timing.

Reference:
Datasheet TMS320F28030/28031/28032/28033/28034/28035 Piccolo Microcontrollers
Find, "General-Purpose Input Timing Requirements"
Find, "General-Purpose Output Switching Characteristics"

Could the 80% signal, 20% transition limit recommendation defined here be applied to this case, or should it be something else?

Forum thread:
F2812 XCLKIN Rise/Fall times

Here's a more complete description from the customer.

customer said:

I have comm signals (via optos) going into the SCI ports on the TMS320F28035.  Because we generate lots of noise inside our products I would like to apply some filtering to these signals.  These parts are CMOS and, in general, CMOS gets unhappy when signals take too long to move between logic levels.  Some CMOS logic families spec a rise/fall time on inputs in the order of 20ns because time spent in between draws large Icc.  Of course, a proper Schmitt trigger fixes everything but I would prefer to avoid that if I can.

Does TI have a spec around maximum rise/fall times for INPUT signals on any of the pins of their DSPs?  GPIO?  SCI?  I could not find such a spec.  I am looking at using a rise/fall time of 1-2us for the signal being presented to the SCI Rx pin, with a baud rate of 56kbd.  I do not want to cause Vdd disturbances inside the part.

  • 0
    TI__Genius 10830 points

    customer said:

    ... if the answer is that it’s not really an issue, my followup question will be a Tr/Tf of 12 seconds… is it ok?

    I will rephase the question with some context.  Let's assume this use case has nothing to do with the Serial Communication Interface (SCI) and just a general purpose I/O configured as an input.  Suppose you want to use this pin as a form of inexpensive comparator where your voltage thresholds match the Vin high and Vin low of the pin.  The question in that case could be rephrased like this.  If a slowly varying analog input signal was applied to a GPIO input pin (where the rise time or fall time could be as slow as 12 seconds) would this cause any damage to the part or significant measureable current consumption?

  • 0 in reply to Jason Work
    TI__Expert 5450 points

    Jason,

    There is no risk of damaging our device or of on-die voltage drop due to holding an input at mid-rail for an extended period.

    The risk for this solution is extra transitions on this input due to other electrical noise sources.  If there is noise on this signal or the device VCCIO/VSS varies during this long duration then this 'slow-static' input could register as multiple pulses.

    If the driver on this line is sufficiently high strength to absorb any noise and there won't be relative supply/ground shift between the DSP and the driver/cap circuit this could work, but that is a system level noise issue. 

    Best regards,

    Jason

  • 0 in reply to Jason Whiles
    TI__Expert 5450 points

    Jason,

    A coworker noted another solution.  The GPIO on this device has an input qualification filter.  Have them check if this feature can help instead of or in addition to the capacitor to filter out extra pulses.

    Best regards,

    Jason